The methodology of reconfigurable circuits and systems is evolving from tinkertoy approach to an: Innovative Parallel Computing Paradigm which combines computing in time with computing in space. The aim of this workshop is to bring together workers from throughout the world for a wide ranging discussion of all forms of field programmable logic, particularly field programmable gate arrays and complex programmable logic devices, and their applications. It is intended to discuss the increasing range of device types, industrial applications, advanced design tool development, research applications, novel system architectures and educational experiences. The workshop will include regular presentations, posters and discussion sessions, and it is expected that most of the delegates will wish to make some contribution to one or more of these. The workshop is the eighth in a series of workshops which were held in Oxford (1991, 1993 and 1995), Vienna (1992), Prague (1994), Darmstadt (1996) and London (1997).
Call for Contributions
Contributions are invited for regular presentation, poster and
discussion sessions. Prospective authors are invited to submit an abstract
of at least 500 words or a full paper of about 10 pages by 7 March 1998
to the Program Chairman. Please send also your full correspondence address,
including e-mail, and fax, and a list of (at most) 5 one-line statements
that best encapsulate the essence of your proposed contribution. Submissions
by e-mail (abakus@informatik.uni-kl.de)
in postscript format (ghostscript-compatible) are highly encouraged.
Notification of acceptance will be posted by 15 May 1998 and final papers must be received by 15 June 1998 to guarantee distribution at the workshop. The workshop proceedings will be published by Springer. For the publication of accepted papers, an electronic as well as a camera-ready version of the paper and the registration of at least one author will be required. Potential exhibitors and tutorial presenters are also invited to contact the Program Chairman. The official conference language as well as the language of submissions and accepted papers will be English.
Scope:
- Novel device, machine and system architectures
- New software and hardware development tools
- Reconfigurable designs, partially or at run-time
- High-level design and compilation research
- Industrial applications and experiences
- Trade-offs between devices, architectures, technologies
- Benchmarking and profiling
- Applications from a wide variety of areas
- Reconfigurable custom computing machines
- Hardware/Software Co-Design using field programmable devices
- Evolvable and adaptable systems
- ASIC emulators, hardware modellers and compiled accelerators
- Fault modelling, testability methods and reliability issues
- Educational experiences and opportunities
- Reconfigurable accelerators and their applications
- Speed-up effects - survey and analysis
- Testing of reconfigurable circuits
The workshop will be held from 31st August to 2nd September 1998 at the National Library of Estonia near the center of Tallinn, the capital of the Republic of Estonia. Tallinn lies in Northern Europe, in the northeast of the Baltic sea region. The good geographical location of Tallinn has favoured it to become an important harbour and a center of industry and trade. The workshop is organized by Tallinn Technical University, which is situated about 5 km from the center of the city. Further local details can be found under the URL: http://www.ttu.ee/fpl98
Program Commitee:
- Doug Amos, Altera, UK
- Peter Athanas, Virginia Tech, USA
- Samary Baranov, Ben Gurion U. Negev,Israel
- Stephen Brown, U. of Toronto, CA
- Klaus Buchenrieder, Siemens AG, FRG
- Steven Casselman, VCC, USA
- Bernard Courtois, INPG, Grenoble, France
- Carl Ebeling, U. of Washington, USA
- Norbert Fristacky, Slovak Technical U., SK
- Manfred Glesner, TH Darmstadt, FRG
- John Gray, Xilinx, UK
- Herbert Grünbacher, Vienna U., Austria
- Reiner Hartenstein, U. of Kaiserslautern, FRG
- Brad Hutchings, Brigham Young U., UAS
- Udo Kebschull, U. of Tübingen, FRG
- Andres Keevallik, Tallinn Technical U., Estonia
- Wayne Luk, Imperial College, UK
- Patrick Lysaght, U. of Strathclyde, Scotland
- Toshiaki Miyazaki, NTT Laboratories, Japan
- Will Moore, Oxford U., UK
- Wolfgang Nebel, U. of Oldenburg, FRG
- Paolo Prinetto, Politecnico di Torino, Italy
- Jonathan Rose, U. of Toronto, Canada
- Zoran Salcic, U. of Auckland, New Zealand
- Michal Servit, Czech T. U., Czech Republic
- Marc Shand, Digital Systems Research Center, USA
- Steve Trimberger, Xilinx, USA
- Prof. Andres Keevallik
Tallinn Technical University
Raja 15 Phone: +372-6104440
Tallinn EE-0026 Fax: +372-6202246
Estonia email: akeev@cc.ttu.ee
http://www.ttu.ee/fpl98
- Prof. Reiner W. Hartenstein
University of Kaiserslautern
P. O. Box 3049 Phone: +49 631 205-2606
D-67653 Kaiserslautern Fax: +49 631 205-2640
Germany email: hartenst@rhrk.uni-kl.de
http://xputers.informatik.uni-kl.de/FPL/index_fpl.html
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