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Technical Presentations
by Reiner W. Hartenstein
University of Kaiserslautern
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Contents of this page List of other pages
Keynotes
Documented Invited Presentations
Awards etc.
Invited Presentations in International
         Company Meetings
Invited Courses given
Other Invited Presentations
Contributions as a Panelist
Refereed Documented Presentations
The nomination procedure:
Nomination Calendar
filled out B-27 Form from Prof Baier
Fellow Committee Address Sticker large
Fellow Committee Address Sticker small
blank B-29 reference form
E-mail notification form: "reference shipped": 
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About the candidate:
Bio and History of E.I.S.
Technical Presentations
Papers and Books
Theses directed
Advisory Activities
Serving Conferences and Journals
Serving Professional Organizations

KARL users
History of KARL
filled out B-27 Form from Prof Baier

Technical Presentations

Keynotes (documented)

  1. Reconfigurable Computing Architectures and Methodologies for System-on-Chip; 3rd  Workshop.on  Enabling Technologies for System-on-Chip Development (SoC 2001),   November 19-20, 2001, Tampere, Finland. 
  2. Reconfigurable Computing: a New Business Model - and its Impact on SoC Design; DSD'2001 EUROMICRO Symposium on Digital Systems Design, Warzaw, Poland, Sept. 4 - 6, 2001
  3. Next Generation Configware merging Prototype and Product;  International Workshop on Rapid System Prototyping, RSP'98, Leuven, Belgium, June 3 - 5, 1998
  4. How to Survive a Possible New Design Crisis; IFIP WG10.1 & 10.7 Workshop, University of Sterling, UK, July 2-4, 1997
  5. Custom Computing Machines - an overview; Workshop on Design Methodologies for Microelectronics, DMM'95, Smolenice Castle, Czech Republic, Sept. 1995
  6. VLSI - from Evolution to Revolution; 1979 Int'l. Symposium on Microcomputers, Budapest, Hungary, Oct. 1979
  7. Impact and Education of the 'New Microelectronics'.; 25 Year Anniversary Symposium of the Institute for Imformation Processing (founded by Karl Steinbuch), University of Karlsruhe, 11. March  1983´
  8. Introduction to VLSI-Systzem Design, E.I.S. Summer School "CAD/VLSI", Arnoldsheim/Taunus, Juni 1986

Documented Invited Presentations

  1. Reconfigurable Computing - Architectures and Methodologies for System-on-Chip; SoC technology seminar "Enabling Technologies for System-on-Chip Development";  Tampere, Finland,  November 19-20, 2001,
  2. Reconfigurable Computing: the Roadmap to a New Business Model - and its Impact on SoC Design; SBCCI 2001 - 15th Symposium on Integrated Circuits  and Systems Design, Brasilia, DF, Brazil, September 10-15, 2001
  3. (invited embedded tutorial) Coarse Grain Reconfigurable Architectures; Asian and South Pacific Design Automation Conference and Exhibit (ASP-DAC 2001), Yokohama, Japan, January 30 - Febr. 2, 2001
  4. Makimoto's Law, the 2nd Design Crisis, and the Future of Reconfigurable Computing; Int'l.   Seminar on Dynamically Reconfigurable Architectures; Schloss Dagstuhl, Germany, June 25-30 2000 -
  5. Reconfigurable Computing; Kongress Highly Reliable Hard- and Software Systems 1999 (HighSys '99), Sindelfingen, Oktober 1999
  6. Freedoms and Necessities in the Knowlege Society;  Freiheiten und Zwaenge in der Wissensgesellschaft ("talk by the fireside")); Annual Symposium of the "Drawing the balance of middle class exonomy politics"  Association for studies of middle class economy (Studiengesellschaft fuer Mittelstandsfragen),  Inzell, Bavaria, Germany. October 1998
  7. On the Application of the KressArray to Rapid Prototyping; Design, Automation and Test in Europe Conference, DATE'98, Paris, France, February 23 - 26, 1998
  8. The Microprocessor is no more General Purpose: why Future Reconfigurable Platforms will win; International Conference on Innovative Systems in Silicon, ISIS'97, Austin, Texas, USA, October 8-10, 1997
  9. A General Approach in System Design Integrating Reconfigurable Accelerators; International Conference on Innovative Systems in Silicon; Austin, Texas, USA, October 9-11, 1996
  10. Xputer: ASIC or Standard Circuit?; Microelectronics Symposium of the German Association for Microelectronics (GME), Oct. 08. - 10, 1993, Dresden, Germany
  11. The Role of Hardware Description Languages in Integrated CAD Systems for VLSI Design (invited paper); CVT Open Workshop; CNET (Centre National d'Etudes de Telecommunication), Meylan (Grenoble), Frankreich, April 1986
  12. Shared Culture: CIF Library, Starting Frames, Scalable Design Rules; NATO Advanced. Study Institute on Design Methodologies for VLSI Circuits, Louvain-la-Neuve, Belgium, 8. - 18. July. 1980
  13. Basics of Structured Design Methodologies: Data Path and Finite State Machines; NATO Advanced. Study Institute on Design Methodologies for VLSI Circuits, Louvain-la-Neuve, Belgium, 8. - 18. July. 1980
  14. On the Interpretive Mechanism of Microprogrammed Systems; EUROMICRO Symposium, Paris, France, 10. - 11. June. 1974

Awards etc.


Invited Presentations in International Company Meetings

  1. Reconfigurable Circuits and their Applications; DaimlerChrysler internal FPGA-Workshop; Schwaebisch  Hall; Germany, Sept. 26 - 28, 2000
  2. Reconfigurable Computing: Taking off to Overcome the Microprocessor; parc forum; Xerox Palo Alto Research Center; May 13, 1999
  3. A Framework for Optimization and Programming of application-domain-specific KressArray Architectures; ST microelectronics Corp., Agrate Brianza, Italy, Febr. 17. 1999
  4. The KressArray: a Survey on Progress and Applications; Siemens AG, Corporate Research, Munich, Germany, October 1998
  5. Reconfigurable Computing: From Tinkertoy to Fundamental Computing Paradigm; NEC Laboratories, Princeton, New Jersey, March 1998
  6. Xputers and Their Programming Environment; Invited Tutorial, ARM Advanced RISC Machines, Ltd. Europe, Cambridge, UK, July 24, 1996.
  7. Xputer - Novel High Performance Computers: Principles and Implemenation; IBM Research Laboratories, Boeblingen, Germany June 21, 1990
  8. European Research Projects on CAD for VLSI; JEIDA, Japanese Electrotechnical Industry Association, Keidanren Kaikan, Tokyo, Japan, Sept. 1985
  9. European Research Projects on CAD for VLSI; Fujitsu Corp., Research Labs, Kawasaki, Japan, Sept. 1985
  10. Hardware Description Languages and their Applications; CSELT - Centro Studi et Laboratori Telecommunicazioni, Torino, Italy, Apr.  11  - 12, 1984
  11. Computer Design Languages als Input Sources for LSI CAD, Siemens AG, Central Laboratories, Munich, Germany, Juli 1979

Invited Courses given

  1. R. Hartenstein: Enabling Technologies for Reconfigurable Computing; Post Conference Tutorial (1 full day),  3rd Workshop.on  Enabling Technologies for System-on-Chip Development  (SoC 2001), Tampere, Finland, November 21, 2001
  2. R. Hartenstein (chair), R. Kress, W. Reinig:: Xputers: Principles, Architectures, Performance; Tutorial on Xputers (1 full day); LIRMM, University of Montpellier,  Montpellier, France, Sept. 1995
  3. R. Hartenstein: Introduction to VLSI System Design for Managers;  (2 days) ; CCG (Carl Cranz Gesellschaft), DFVLR (German Aerospace Research Center), Oberpfaffenhofen, Germany, 1989
  4. R. Hartenstein: Introduction to VLSI System Design for Managers;  (2 days) ; CCG (Carl Cranz Gesellschaft), DFVLR (German Aerospace Research Center)    Oberpfaffenhofen, Germany, 1988
  5. R. Hartenstein: Introduction to VLSI System Design;  (5 days) ; CCG (Carl Cranz Gesellschaft), DFVLR (German Aerospace Research Center), Oberpfaffenhofen, Germany, Sept.1988
  6. M Glesner, R. Hartenstein (chair), K. Mueller-Glaser, Th. Vierhaus: Introduction to VLSI SSystem Design; ordered by UNESCO and Portugese Computer Society, Lisbon, Portugal, Aug.1987
  7. R. Hartenstein: Introduction to VLSI System Design for Managers;  (2 days) ; CCG (Carl Cranz Gesellschaft), DFVLR (German Aerospace Research Center),  Oberpfaffenhofen, Germany, 1987
  8. R. Hartenstein: Introduction to VLSI System Design;  (5 days) ; CCG (Carl Cranz Gesellschaft), DFVLR (German Aerospace Research Center), Oberpfaffenhofen, Germany, Sept.1987
  9. R. Hartenstein: Introduction to VLSI System Design for Managers;  (2 days) ; CCG (Carl Cranz Gesellschaft), DFVLR (German Aerospace Research Center), Oberpfaffenhofen, Germany, 1986
  10. R. Hartenstein: Introduction to VLSI System Design;  (5 days) ; CCG (Carl Cranz Gesellschaft), DFVLR (German Aerospace Research Center), Oberpfaffenhofen, Germany, Sept.1986
  11. R. Hartenstein: Introduction to VLSI System Design for Managers;  (2 days) ; CCG (Carl Cranz Gesellschaft), DFVLR (German Aerospace Research Center), Oberpfaffenhofen, Germany,  1985
  12. R. Hartenstein: Introduction to VLSI System Design;  (5 days) ; CCG (Carl Cranz Gesellschaft), DFVLR (German Aerospace Research Center)    Oberpfaffenhofen, Germany, Sept. 1985
  13. R. Hartenstein: Introduction to VLSI System Design for Managers;  (2 days) ; CCG (Carl Cranz Gesellschaft), DFVLR (German Aerospace Research Center)    Oberpfaffenhofen, Germany,  1984
  14. R. Hartenstein: Introduction to VLSI System Design;  (5 days) ; CCG (Carl Cranz Gesellschaft), DFVLR (German Aerospace Research Center), Oberpfaffenhofen, Bavaria, Germany, April 1984 
  15. R. Hartenstein: Introduction to VLSI System Design for Managers;  (2 days) ; CCG (Carl Cranz Gesellschaft), DFVLR (German Aerospace Research Center)   Oberpfaffenhofen, Germany,  1983
  16. R. Hartenstein: Introduction to VLSI System Design;  (5 days) ; CCG (Carl Cranz Gesellschaft), DFVLR (German Aerospace Research Center)  Oberpfaffenhofen, Bavaria, Germany, April 1983, -
  17. R. Hartenstein: Introduction to VLSI System Design; (3 days) Abteilung Elektrotechniek, Techn. Hochschule, Twente, Enschede, Netherlands, Nov. 17. - 19,. 1982
  18. R. Hartenstein: Introduction to VLSI System Design; (3 days) GMD (Gesellschaft fuer Mathematik und Datenverarbeitung) Schloss Birlinghoven, St. Augustin, Germany, Oct. 18. - 20, 1982
  19. R. Hartenstein: Introduction to VLSI System Design, (3 days), GMD (Gesellschaft fuer Mathematik und Datenverarbeitung),  Schloss Birlinghoven, St. Augustin, Germany, Sept. 27. - 29, 1982 -
  20. R. Hartenstein: Introduction to VLSI System Design;  (5 days), University of Patras, Greece, October 1982
  21. R. Hartenstein: Introduction to VLSI System Design; (3 days), Research Center Demokritos, Athens, Greece, , Oct. 1982
  22. R. Hartenstein: Introduction to VLSI System Design;  (3 days), INPG Grenoble, France, Oct. 1982
  23. R. Hartenstein: Introduction to VLSI System Design; (3 days), Siemens- AG, Zentrallabor, Munich-Neuperlach, Germany,  (June 1982)
  24. R. Hartenstein: Introduction to VLSI System Design;   (3 days), Siemens-AG, Geraetewerk Karlsruhe (4. / 7. / 9. June 1982)
  25. R. Hartenstein: Hardware Description Languages and their Applications; CSELT - Centro Studi et Laboratori Telecommunicazioni, Torino, Italy,  (27. Feb. - 2. March. 1983)
  26. R. Hartenstein: (part of a 3 week VLSI design course); Hardware Description Languages and their Applications;  Schuola Guglielmo Reiss-Romoli, L'Aquila, Italy, 1982


Other Invited Presentations

  1. Stream-based Arrays: Converging Design Flows for both, Reconfigurable and Hardwired; IFIP International Conference on Very Large Scale Integration ( VLSI-SoC 2001 ), December 2- 4, 2001,  Montpellier, France
  2. Chances of the IT Industry; Heinz Nixdorf Forum Future and Professsion (Zukunft und Beruf), Paderborn, Germany, 6. - 10. March 2001;
  3. Programming Reconfigurable Circuits: just Logic Synthesis on a Strange Niche Platform? Scientific Colloquium of the Computer Science Department, Technical University of Dresden, Germany, 8. Juni  2000
  4. Will Reconfigurable Computing overcome the microprocessor?;  Annual Symoiosium INFOfest'98, Budva, Montenegro, Yugoslavia, September 26 - October 3, 1998
  5. Another Point of View on the Internet; INFOfest'98, Budva, Montenegro, September 26 - October 3, 1998
  6. Systems for Electronic Business on the Internet; Invited talk, Annual Symposium INFOfest'98, Budva, Montenegro, Yugoslavia, September 26 - October 3, 1998
  7. From  FPGA to "Reconfigurable Computing; Computer Science Colloquium, Universiy of Koblenz, Germany, July 1998
  8. Reconfigurable Computing with KressArray and Xputer; Astronomisches Recheninstitut (ARI), University of Heidelberg, Heidelberg, Germany, July 1998
  9. From FPGA to "Reconfigurable Computing; Informatik-Kolloquium, University of  Karlsruhe, Germany, June 1998
  10. Reconfigurable Computing with KressArray and Xputer machine paradigm; University of Belgrade, Yugoslavia, May 1998
  11. Reconfigurable Computing with KressArray and Xputer machine paradigm, Colloquium, Carnegie Mellon University, Pittsburgh, PA, March 1998
  12. Reconfigurable Computing: From Tinkertoy to Fundamental Computing Paradigm; University of California, Irvine, January 1998
  13. Reconfigurable Computing: From Tinkertoy to Fundamental Computing Paradigm; San Jose State University, January 1998
  14. Reconfigurable Computing: From Tinkertoy to Fundamental Computing Paradigm; University of Southern California, Los Angeles, January 1998
  15. Trends ini reconfiguriable circuits; Colloquium, TU-Darmstadt, Germany, Dec. 8, 1997.
  16. Why a Second Machine paradigm?; Colloquium, TU Darmstadt, Germany Dec. 8, 1997.
  17. Reconfigurable Computing: an Alternative to ASICs?; Colloquium TU Chemnitz, Germany, Nov. 26, 1997.
  18. Reconfigurable Computing: an Alternative to ASICs?; Colloquium, University of Linz, Austria, Nov. 20, 1997.
  19. Reconfigurable Computing:  an Alternative to ASICs?; Colloquium, University of Erlangen, Germany, July 18, 1997.
  20. A Machine Paradigm for dynamically reconfigurable Processors; Colloquium, University of Jena, Mai 28, 1997.
  21. Computer Engineering: fifth wheel of the wagon?; 60th Birthday Colloquium, University of Passau, Germany, Mai 5, 1997.
  22. Reconfigurable Hardware: form Tinker Toy to fundamental Computing Paradigm; Colloquium, IMEC Leuven, Belgium, April 18, 1997.
  23. High-Performance Computing: about Scenes and Crises; GI/ITG Workshop on Custom Computing, Schloss Dagstuhl, Germany, June 1996
  24. Teach our Schools the wrong Subjects?; Wissenschaftspressekonferenz, Bonn-Bad Godesberg, Germany, Dez. 1995
  25. Quo vadis Computer Science?; Colloquium, University of Rostock, Germany, Okt. 1995
  26. Xputers: Principles, Architectures, Performance; Tutorial on Xputers: New Horizons in Computing Power, University of Montpellier, France, Sept. 1995
  27. Xputers, a New Computational Paradigm;  Institute of Microelectronics; Singapore, Nov. 1994
  28. Xputers, a New Computational Paradigm;  Colloquium, School of Computing, Curtin University of Technology, Perth, Australia, Nov. 1994
  29. Xputers, a New Computational Paradigm; Kolloquiumsvortrag, University of Augsburg, Febr..02, 1993, Augsburg, Germany,
  30. A new Machine Paradigm as an Alternative to von Neumann: a consequence of FPLD-/FPGA Application; IMS, Fraunhofer Institute of Microelectronic Systems, Duisburg, March 1992
  31. Xputers: A Novel High-performance Machine Paradigm; Colloquium, University of Catania, Italy, April 1992
  32. Xputers: A Novel High-performance Machine Paradigm; Colloquium, University of Linkoeping, Sweden, May 1992
  33. Xputer: ein neues Hochleistungs-Maschinenparadigma; Fa. Hermstedt, Mannheim, Germany, Oktober 1992
  34. Xputer: a Machine Paradigm for better efficiency of Hardware; Colloquium, Fern-Universitaet Hagen, Germany, Feb. 1991
  35. Xputer: a Machine Paradigm for better efficiency of Hardware; Colloquium, FAW, University of Ulm, Germany, April 1991
  36. Xputer: a Machine Paradigm for High Performance Computers;  Colloquium, GMD, Schloss Birlinghoven, St. Augustin, Germany, April 1991
  37. Xputers as High Performance Computers: their Principles and Implementations; ITT Corporation, Freiburg, Germany, May 1991
  38. A High Performance Machine Paradigm Based on Auto-Sequencing Data Memory; Information Science Inastitute (ISI), University of Southern California, Los Angeles, Sept. 1991
  39. A High Performance Machine Paradigm Based on Auto-Sequencing Data Memory;  ICSI International Computer Science Institute, Berkeley, Sept. 1991
  40. A High Performance Machine Paradigm Based on Auto-Sequencing Data Memory;  George Washington University, Washington, DC, Okt. 1991
  41. A Novel ASIC Design Approach Based on a New Machine Paradigm; Colloquium, University of Tainan, Taiwan, Sept. 1991
  42. A Flexible Hardware Accelerator and its Applications in EDA, 16th CAVE Workshop, Gent, Belgien, Dezember 1990
  43. Xputer: a Machine Paradigm for better efficiency of Hardware; Fern-Universitaet Hagen, 15. November 1990
  44. Xputer: a Machine Paradigm for better efficiency of Hardware; City Polytechnic of Hong Kong, Hong-Kong, Oct 16, 1990
  45. Xputer: a Machine Paradigm for better efficiency of Hardware; University of Hong Kong, Hong-Kong, Oct 15, 1990
  46. Xputer: a Machine Paradigm for better efficiency of Hardware, Waseda University, Tokyo, Japan, Oct 12, 1990
  47. Xputer - Novel High Performance Computers: Principles and Implemenation; Electrotechnical Laboratory at Ibaraki, Kawasaki, Japan, Oct 11, 1990
  48. Implementation of Parallel Algorithms on Xputer: More Performance from Less Hardware, Colloquium, University of Kyoto, Kyoto, Japan, Oct. 8, 1990
  49. Xputer: a new Machine Paradigm for Very High Performance Computers; Lessacher Informatik-Koilloquien, Lessach, Austria, Sep 18 - 21, 1990
  50. Xputer: a new Machine Paradigm for Very High Performance Computers; University of Mannheim, June 12, 1990
  51. Xputer: a Machine Paradigm for improved efficienca of Hardware, Colloquium, University of Karlsruhe, June 11, 1990
  52. Xputers: Innovative High Performance Computers - their Principles and Implementation; Techn. University of Vienna, Austria, May 4, 1990
  53. Xputers: Innovative High Performance Computers - their Principles and Implementation;  Universidad Politecnica Catalunya, Barçelona, Spain, Febr. 26, 1990
  54. Xputers: Innovative High Performance Computers - their Principles and Implementation;  Universidad Politecnica de Madrid, Spanien, Februar 23, 1990
  55. Xputers: Innovative High Performance Computers - their Principles and Implementation;  Universidad Complutense, Madrid, Spain, Febr. 22, 1990
  56. Xputer: A Universal Accelerator for Digital Signal Processing, I+D Telefónica y Desarollo, Madrid, Spain, Febr 21, 1990
  57. Xputer: A Novel Machine Paradigm for efficient Implementation of parallel Algorithms, Colloquium, Universidad Cantabria, Santander, Spain, Febr 20, 1990
  58. Xputers: Innovative High Performance Computers - their Principles and Implementation; Colloquium, University of Tuebingen, Germany, Febr. 6, 1990
  59. DesignTools at Higher Abstraction Levels;  Professor Conference "Mikroelektronik" of the Federal Ministry of Post and Telecommunication; Darmstadt, Germany, Nov. 1987
  60. KARL-related VLSI CAE Tools; PUC (Catholic University), Rio de Janeiro, Brasil, Nov. 1987
  61. Research on VLSI Design at Kaiserslautern University; UFRJ (Bundes-Universitaet), Rio de Janeiro, Brasil, Nov. 1987
  62. RT Level CAE Tools for VLSI Design; IBM Centro Scientifico; Rio de Janeiro, Brasil, Nov. 1987
  63. Introduction to using KARL in VLSI Design; CTI (Centro Technologica para Informatica) Campinas, SP, Brazil, Oct. 1987
  64. VLSI CAE Tool Integration to support Design for Testability at Early Phases of the Design Process; CTI (Centro Technologica para Informatica) Campinas, SP, Brasil, Oct. 1987
  65. The E.I.S. Project - a German Multi University Effort of Research and Instruction in VLSI Design; CTI (Centro Technologica para Informatica) Campinal, SP, Brasil, Oct. 1987
  66. VLSI Structural Modelling by RT Language Expressions; CTI (Centro Technologica para Informatica) Campinas, SP, Brasil, Oct. 1987
  67. Introduction to Using KARL for VLSI Design; Computer Science Department, UFRGS (Bundes-Universitaet Rio Grande do Sul), Porto Allegre, RGS, Brasil, Oct. 1987
  68. MoM - a semi von-Neumann Accelerator Architecture; Computer Science Department, UFRGS (Bundes-Universitaet Rio Grande do Sul), Porto Allegre, RGS, Brasil, Oct. 1987
  69. The E.I.S. Project and future aspects of Research and Instruction in VLSI Design in the Federal Republic of Germany; Jahrestagung der Brasilianischen Gesellschaft fuer Mikroelektronik, Porto Allegre, RGS, Brasil, Oct. 1987
  70. The E.I.S. Project - a Nation-wide Effort of Research and Instruction in VLSI Design in the Federal Republic of Germany; CTI (Centro Technologica para Informatica) Campinas, SP, Brasil, Oct. 1987
  71. MoM - a semi von-Neumann Accelerator Architecture; CTI (Centro Technologica para Informatica) Campinas, SP, Brasil, Oct. 1987
  72. The E.I.S. Project - a Multi University Effort of Research and Instruction in VLSI Design in the Federal Republic of Germany; ITA (Inst. Technologica para Aeronautica), CTA (Centro Technologica para Aeronautica), Sao Jose dos Campos, SP, Brasil, Oct. 1987
  73. Research on VLSI Design Methodologies at Kaiserslautern University, ITA (Inst. Technologica para Aeronautica), CTA (Centro Technologica para Aeronautica), Sao Jose dos Campos, SP, Brasil, Oct. 1987
  74. Structured VLSI Design using Structural Modelling by RT Language Expressions; Dept. of Electrical Engineering, UNICAMP (Universitaet) Campinas, SP, Brasil, Oct. 1987
  75. Synergistic VLSI CAE Tool Integration at Early Phases of the Design Process; Computer Science Dept., UNICAMP (Universitaet) Campinas, SP, Brasil, Oct. 1987
  76. Integration of Conceptual VLSI Design and Test Development; CPqD TELEBRAS (Brasilian Federal Research and Development Center for Telecommunication), Campinas, SP, Brasil, Oct. 1987
  77. The German Multi University E.I.S. Project; CPqD TELEBRAS (Brasilian Federal Research and Development Center for Telecommunication), Campinas, SP, Brasil, Oct. 1987
  78. MOM - Map-oriented Machine: A Flexible Architecture for Image Processing, EUROMICRO Symposium; Portsmouth, UK, Sept. 1987
  79. Recent Developments in CAD for VLSI;  Elektrotechnical Colloquium; University of Duisburg, Germany, Oct. 1985
  80. Recent Developments in CAD for VLSI; INPG (Institute Nationonal Polytechnique de Grenoble), Grenoble, France, Feb 23. - 24, 1984)
  81. Impact and Education of the 'New Microelectronics; Colloquium, Fern-University of Hagen, Dec. 21, 1983
  82. Impact and Education of the 'New Microelectronics; Colloquium, Technical University, Vienna, Austria, 6. 12. 1982
  83. The 'New Microelektronics': new forms of cooperation between Informatics and Semiconductor Technology;  Colloquium, University of Erlangen-Nuremberg, Germany, Nov. 14, 1982
  84. The 'New Microelectronics': new forms of cooperation between Informatics and Semiconductor Technology;  Annual Conference of the German Computer Society (GI - Gesellschaft fuer Informatik), University of Kaiserslautern,. Oct. 5 - 7, 1982
  85. The 'New Microelektronics': new forms of cooperation between Informatics and Semiconductor Technology; Colloquium, Techn. University of Munich, Germany, July 22,. 1982
  86. The 'New Microelektronics': new forms of cooperation between Informatics and Semiconductor Technology; Colloquium, University of Brauschweig, June 14, 1982
  87. The 'New Microelektronics': new forms of cooperation between Informatics and Semiconductor Technology; Colloquium, Univ.of Erlangen, May  5. 1982
  88. The 'New Mcroelektronics': new forms of cooperation between Informatics and Semiconductor Technology;  (invited presentation to the board of directors)  GMD Research Center, Schloss Birlinghoven, May 10, 1982
  89. Hardware Description Languages and their Applications;  Colloquium, Linkoepings University, Linkoeping, Sweden, 1980
  90. Hardware Description Languages and their Applications;  Colloquium, University of Karlsruhe, Karlsruhe, Germany,  Nov. 1979

  91. Trends in CAD for VLSI ; Seminar*, Department of Informatics, University of  Kaiserslautern, 1979
  92. Optimized Lab Course Equipment for Introducing LSI Components ;  Seminar*,  Department of Informatics, University of Kaiserslautern , 1979
  93. Hardware Description Languages ; Informatics Colloquium*, University of Kaiserslautern, 1975
  94. On the Use of  KARL for Description and Design of Hardware for MSI or LSI Chips;  Colloquium of the Computer Science Department, University of Maryland, College Park, Maryland, 13. Sept. 1974
  95. Hardware Description Languages and their Applications; Colloquium, University of Maryland, College Park, Maryland, Sept. 13, 1974
  96. Concepts of Mikroprogramming; Conference on  Minicomputers and Peripherals; Frankfurt, Germany., Feb. 15, 1973
  97. Concepts of Mikroprogramming; Techn. University of Vienna, Austria, Nov. 19, 1973
  98. Concepts of Mikroprogramming; Techn. University of Graz, Austria, Nov. 20, 1973
  99. Concepts of Mikroprogramming; Austrian Cybernetics Association, Vienna, Austria, Nov. 22, 1973
  100. Hierarchy of Interpreters for Modelling Complex Digital Systems; Colloquium, Techn, University of  Darmstadt, Germany, Feb. 13, 1973
  101. Hiierarchy of Interpreters for Modelling Complex Digital Systems; Colloquium, University of Aarhus, Denmark, May 17, 1973
  102. Hierarchy of Interpreters for Modelling Complex Digital Systems; Colloquium, University of Hamburg, May 21, 1973

  103. Seminars etc.
  104. How to Teach Computer Organization ; Colloquium*, University of Bonn , Germany, 29. Jan. 1973
  105. How to Teach Computer Organization Seminar* Institute for Informatics IV, University of Karlsruhe , Germany, 5. Feb. 1973
  106. An Example Computer Architecture for Dynamic Microprogramming ; Seminar fuer Mikroprogrammierung, Inst. f. Informatik, University of Karlsruhe , Germany, 8. Feb. 1972
  107. A Flexible Breadboard System for Experiments in Undergraduate Computer Hardware Lab Courses ; 2nd Annual Conference of the GI (Gesellschaft fuer Informatik), Karlsruhe , Germany, 4. Oct. 1972
  108. CRT I/O Devices and their Applications in Man / Machine Dialogue; Conference*, Elektrotechnischer Verein Mittelbaden (subdivision of VDE), Karlsruhe , Germany, Jan. 12,. 1971
  109. Logic Analyzers ; Seminar*, Institute for Information Processing, University of Karlsruhe , Germany, May 23, 1971
  110. On the Hardware / Software Interface ;  Informatics Colloquium*, University of Karlsruhe , Germany, May 19,  1971
  111. Microoperations and their Hardware Implementation ; Seminar* on Microprogramming, Inst. f. Informatik, University of Karlsruhe , Germany, 14. Dec. 1971
  112. Designing Finite State Machines for Character Recognition from Regular Expressions ;  Seminar*, Institute for Information Processing, University of Karlsruhe , Germany, Jan 17, 1969
  113. CRT Screen I/O and its Applications ; Informatics Colloquium*, University of Karlsruhe , Germany, July 14, 1969
  114. CRT I/O Devices and their Applications ;  Seminar*, Institute for Information Processing, University of Karlsruhe , Germany, May 3, 1968.
  115. About F.S.M. Controller Simulation ;  Seminar*, Institute for Information Processing, University of Karlsruhe , Germany, July 28, 1967
  116. Automatic Synthesis and Minimization of  State Transition Tables for Automatic Character Recognition ;  Seminar, Institute for Information Processing, University of Karlsruhe , Germany, 27. 10. 1967
  117. Serial Processing Methods in Character Recognition ; Seminar*, Institute for Information Processing, University of Karlsruhe, Nov 11,. 1966
  118. Formal methods in F.S.M. Controller Analysis and Synthesi ; Seminar*, Labor fuer Elektronics Laboratory, Nucleear Research Center, Karlsruhe, Germany, June 1965
  119. Optical Methods in Pattern Recongnition ;  Seminar*, Institute for Information Processing, University of Karlsruhe , Germany, 2. July 1965
  120. About Display Techniques for Computer I/O. ;  Seminar*, Institute for Information Processing, University of Karlsruhe , Germany, 17. Dec. 1965

Contributions as a panelist

  1. Panel "Reconfigurable Computing"; together with Lech Józwiak (chair), Steve Guccione (Xilinx), Rolf Ernst (TU Braunschweig), Kjell Torkelsson (Ericsson), Adam Postula (U Queensland): DSD'2001 - EUROMICRO SYMPOSIUM ON DIGITAL SYSTEM DESIGN:  Architectures, Methods, and Tools, Warsaw, Poland, September 4 - 6, 2001.
  2. Panel* "today at highschool - tomorrow a boss";  together with : Juergen Mayer, TV station WDR 2 (moderator); Marco Elling, CEO BloxAG,  Muenster; Prof. Dr. Stefan Fischer, International University in Germany, Bruchsal; Matthias Kenter, Institut der Deutschen Wirtschaft, Cologne; Dr. Ruediger Schiller, Deutsche Ausgleichsbank, Bonn    --- Heinz Nixdorf Forum Zukunft und Beruf, Paderborn, Germany, March 6 - 10, 2001;
  3. Panel* "Freedoms and Necessities in the Knowlege Society" ("talk by the fireside"); Symposium on "Drawing the balance of middle class exonomy politics", Annual Symposium of the Association for studies of middle class economy (Studiengesellschaft fuer Mittelstandsfragen), Inzell, Bavaria, Germany. Oct. 1998
  4. Panel* "Information Society and Education"; togehter with Prof.  Dr. M. Polke  (moderator), and others, Conference on Achitecture of Computing Systems (ARCS'97), Rostock, Germany, Sept 8-11, 1997 
  5. Panel "Is Germany hostile to innovations?"  together with Dr. jur. Manfred Genz, DaimlerChrysler (organizer), Leitung: Prof. Dr. Helmut Baumgarten , TU Berlin (moderator), and others ... 4th IMT annual conference on "Management and Technology in Global Competition", Berlin, Germany, Nov. 6 - 7, 1966  Hilton Hotel am Gendarmenmarkt 
  6. Panel* "Is Germany hostile to innovations?", together with Prof. Dr. Klaus Brockhoff, Univérsity of Kiel (moderator); Marco Boerries, founder Star Division Software Berlin/Fremont; Wolfgang Branoner, Minister, Senate of Berlin; Paulus Neef, founder PIXELPARK Multimedia GmbH Berlin, concluded by* Dr. h.c. Lothar Spaeth, CEO Jenoptic, Jena, Germany: "Chances and Problems with Innovations in Germany"; .4th IMT annual conference on "Management and Technology in Global Competition", Berlin, Germany, Nov. 6 - 7, 1996
  7. panel "Why can't we agree on a Single Standard?", (organized by Tamio Hoshino, NTT LSI Laoratories, Japan) together with Daniel D. Gajski, UC Irvine, Osamu Karatsu, NTT Corp., Tokyo, Japan, Erich Marschner, CLSI, Rockville, MD, USA, Nick Peeling, Ministry of Defense, Malvern, UK, Robert Piloty, TU Darmstadt, Germany; ACM / IEEE Design Automation Conference 1989 (DAC '89), Las Vegas, Nevada, USA June 1989
  8. panel "Why VLSI Specification?", together with: Jonathan Allen, M.I.T, Cambridge, USA, Dwight Hill, IT&T Bell Labs, Murray Hill, NJ, USA, Carlo Sequin, UC Berkeley, Nick Tredennick, IBM Yorktown Heights, Niklaus Wirth, ETH Zuerich; IFIP Summer School on VLSI Design; Beatenberg, Switzerland, 1986

Refereed Documented Presentations

  1. (embedded tutorial) A Decade of Reconfigurable Computing - a Visionary Retrospective; Int'l Conf. and Exhibit on Design, Automation and Test in Europe (DATE 2001); Munich, Germany, March 13 - 16, 2001
  2.  Interfacing the MoM-PDA to an Internet-based Development System; 32th Annual Hawaii Int'l Conf. on System Science (HICSS-32), Hawaii, USA, January 5 - 8,1999
  3. A Revival of Systolic Arrays by Course Granularity Reconfigurable Circuits, Seminar on Dynamically Reconfigurable Architectures, Schloss Dagstuhl, Germany, February 22 - 27, 1998
  4. Parallelization in Co-Compilation for Configurable Accelerators; Asia and South Pacific Design Automation Conference, ASP-DAC-98, Yokohama, Japan, Feb. 10-13, 1998
  5. An Innovative Platform for Embedded System Design ; Workshop Zielarchitekturen Eingebetteter Systeme, ZES'97, in conjunction with the Fachtagung Architekturen von Rechensystemen ARCS'97, Rostock, Germany, September 11, 1997
  6. An Embedded Accelerator for Real World Computing; IFIP International Conference on Very Large Scale Integration, VLSI'97, Gramado, Brazil, August 26-29, 1997
  7. A Two-level Co-Design Framework for data-driven Xputer-based Accelerators; 30th Annual Hawaii Int. Conf. on System Science (HICSS-30), January 7-10, Wailea, Maui, Hawaii, USA, 1997.
  8. Co-Design and High Performance Computing: Scenes and Crisis; Reconfigurable Technology for Rapid Product Development & Computing, Part of SPIE International Symposium '96, Boston, USA, Nov. 1996
  9. A Synthesis System for Bus-based Wavefront Array Architectures; ASAP 96 Application Specific Array Processors, Chicago, USA, August 1996
  10. Two-Level Hardware/Software Partitioning Using CoDe-X; Int. IEEE Symp. on Engineering of Computer Based Systems (ECBS), Friedrichshafen, Germany, March 1996
  11. Two-Level Partitioning of Image Processing Algorithms for the Parallel Map-oriented Machine; 4th Int'l Workshop on Hardware/Software Co-Design CODES/CASHE '96, Pittsburgh, USA, March 1996
  12. CoDe-X: A Novel Two-Level Hardware/Software Co-Design Framework; VLSI Design 96 Conf., Bangalore, India, January 1996
  13. CoDe-X: A Novel Two-Level Hardware/Software Co-Design Framework; 9th International Conference on VLSI Design, Bangalore, India, Jan. 1996
  14. A Reconfigurable Parallel Architecture to Accelerate Scientific Computation; International Conference on High Performance Computing, New Delhi, India, Dec. 1995
  15. Data-procedural Languages for FPL-based Machines; 4th Int'l  Workshop On Field Programmable Logic And Applications, FPL-94, Prague, September 7-10, 1994
  16. Parallelizing Compilation for a Novel Data-Parallel Architecture; PCAT-94, Parallel Computing: Technology and Practice, Wollongong, Australia, Nov. 1994
  17. KARL and ABL; (Invited Paper), NATO Advanced Study Institute on Fundamentals and Standards in Hardware Description Languages, 16. - 26.04.93, Il Ciocco, Barga, Italy, 1993
  18. CASHE, Using a New Machine Paradigm; Workshop Codes/CASHE´93, 24. - 27.05.93, Igls, Innsbruck, Austria, 1993
  19. Hardware/Software Co-Design; 3rd International Workshop on Field Programmable Logic and Applications, 07. - 10.09.93, Oxford, England, 1993
  20. MoPL-3: A New High Level Xputer Programming Language; 3rd International Workshop on Field Programmable Logic and Applications, 07. - 10.09.93, Oxford, England, 1993
  21. A Novel High-performance Machine Paradigm and ASIC Design Methodology; International Design Automation Workshop ("Russian Workshop"), 29. - 30. 06. 92, Moskau, Russia, 1992
  22. Novel High Performance Machine Paradigms and Fast-Turnaround ASIC Design Methods: a Consequence of, and a Challenge to, Field-programmable Logic ; 2nd International Workshop on Field-Programmable Logic and Applications, 31. 08. - 02. 09. 92, Vienna University of Technology, Vienna, Austria, 1992
  23. A High Performance Machine Paradigm Based on Auto-Sequencing Data Memory; HICSS-24 Hawaii International Conference on System Sciences, Koloa Hawaii, January 1991
  24. Xputer: Neuartige Hochleistungsprozessoren, deren Prinzipien und Realisierungen; University of Stuttgart,  Germany, Jan. 1991
  25. Xputer use for Acceleration of Neuronal Network Simulation; 3rd Int. Workshop on Adaptive Learning and Neuronal Networks, Schloss Reisensburg, Germany, 2.-7.7 1991
  26. A Technology Adaptable Device Generator as a Frontend for Layout Generators, EDAC '90 - European Design Automation Conference, Glasgow, UK, March 1990
  27. Xputers - An Open Family of Non von Neumann Architectures, ITG/GI-Konferenenz ueber die Architektur von Rechensystemen, Munich, March 5 - 7, 1990
  28. Using Xputers as Inexpensive Universal Accelerators in Digital Signal Processing; Bilkent '90 International Conference on New Trends in Communication, Control and Signal Processing, Ankara, Turkei, Juli 1990
  29. The Machine Paradigm of Xputers and its Application to Digital Signal Processing Acceleration, International Conference on Parallel Processing, St. Charles, Illinois, August 1990
  30. A Novel Paradigm of Parallel Computation and its Use to Implement Simple High Performance Hardware; Internationale Konferenzen CONPAR '90 und VAPP IV, Zurich, Schweiz, September 1990
  31. Extremely Efficient Array Emulation by a Computational Device using Innovative Machine Principles; ASICS Open Workshop on Regular Array Architectures, Patras, Greece, 24. September 1990
  32. A Novel Paradigm of Parallel Computation and its Use to Implement Simple High Performance Hardware, InfoJapan '90, Tokio, Japan, October 1990
  33. Mapping Systolic Arrays onto the Map-Oriented Machine (MoM); International Workshop on Systolic Arrays, Killarney, Mai 1989
  34. SYS3 - A CHDL-Based Systolic Synthesis System; IFIP Int'l Symposium on Hardware #descriptive Languages 1989 (CHDL '89), Washington, D.C. June 1989
  35. A Pseudo Parallel Architecture for Systolic Algorithms; IFIP Workshop on Parallel Architectures in Silicon, Grenoble, December 1989
  36. Some new features in KARL-4 and superKARL - a survey; 2nd ABAKUS Workshop, Innsbruck, Austria, 4. - 7.9.1988
  37. Integration of Simulation, Test Development and Test in a High Level Design Environment; IFIP TC10 Working Conference on VLSI Architecture, Pisa, Italien, 20. - 22.09.1988
  38. Computer Structure Partitioning Schemes; IFIP TC10 Working Conference on VLSI Architecture, Pisa, Italy, 20. - 22.09.1988
  39. Design for Testability by Integration of Functional Simulation and Test Pattern Development; NTG workshop (Nachrichtentechnische Gesellschaft, Stuttgart, 1986
  40. Future Work on KARL and related CAD Tools; ABAKUS Workshop, Passau, Germany, June 1986
  41. ABLED - ein CAD Tool for Designingn Digital Systems*, Proc. DECUS Muenchen Symposium, Stuttgart, Germany, 1986
  42. Higher Level Simulation and CHDLs; IFIP Summer School on VLSI Design; Beatenberg, Switzerland, 1986
  43. CAD Tools for Experimenting with Alternative VLSI Architectures; IFIP Workshop on VLSI Architectural Design; Torino, Italy, 1986
  44. Map-Oriented Processing: Accelerator concept and VLSI design environment for a class of data processing problems; Seminar*, IMS, Fraunhofer-Institute for Microelectronic Systems, Duisburg, Germany, July 1986
  45. Towards Engineering System Sciences; Annual Symposium of SEFI (Societé Européenne de Formation des Ingenieurs), Madrid, Spane, Sept. 1985
  46. Towards Engineering System Sciences.,   GI Conference on Modeling digital Systems, Bernried, Starnberger See, Germany, June 24. - 25, 1982
  47. Towards the personal CAD station; Mikroelektronics Congress, Munich, Germany, Nov. 1982
  48. KARL as an interpretive graphic input to VLSI CAD tools; 2nd Int'l. Symposium on Computer Hardware Descriptions Languages and their Applications (CHDL), Palo Alto, Oct. 1979
  49. A Computer for the Hardware Description Language KARL; Annual Conference of the GI (Gesellschaft fuer Informatik), Berlin, Sept. 1978 
  50. Generalized Principles of Microprogrammable Computer Structures*; Annual Conference of the GI (Gesellschaft fuer Informatik), Berlin, Sept. 1978 
  51. Hierarchy of Interpreters for Modelling Complex Digital Systems; Colloquium,  Annual Conference of the GI (Gesellschaft fuer Informatik), Hamburg, Oct. 8 - 10, 1973
  52. On the Use of  KARL for Description and Design of Hardware for MSI or LSI Chips; 2nd Int'l. Symposium on Computer Hardware Descriptions Languages and their Applications (CHDL), Darmstadt, Germany, July 31. - Aug 1, 1974
  53. The Use of ABL for Design and Description of Hardware Structures; IFIP 2nd Int'l. Symposium on Computer Hardware Descriptions Languages and their Applications (CHDL), Darmstadt, Germany, 31. July. - 1. Aug. 1974
  54. Microprogramming Concepts - A Step towards Structured Hardware Design; 7th ann. Symposium on Mircoprogramming (MICRO'74), Palo Alto, 29. Sept. - 2. Oct. 1974
  55. Concepts of Microprogramming ;   GI-NTG-Conference 'Structure and Operation of Computers', Braunschweig , Germany, 20. - 22. March. 1974
  56. Increased Hardware Complexity  -  A Challenge to Computer Science Education; 1st Int'l. Symposium for Computer Architecture (ISCA), Gainesville, Florida, Dec. 9. - 11, 1973
  57. A special Machine System for Visual Pattern Recognition (H. Kazmierczak, F. Holdermann, speaker: R. Hartenstein); AGARD-Bionics-Symposium, Brussels, Belgium, Sept. 1968
_______________
*) in German language
 
 
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Keynotes
Documented Invited Presentations
Awards etc.
Invited Presentations in International 
    Company Meetings
Invited Courses given
Other Invited Presentations
Contributions as a Panelist
Refereed Documented Presentations
The nomination procedure:
Nomination Calendar
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About the candidate:
Bio and History of E.I.S.
Technical Presentations
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Advisory Activities
Serving Conferences and Journals
Serving Professional Organizations

KARL users
History of KARL
filled out B-27 Form from Prof Baier