Xputer Lab's H/S Co-Design related publications


For more details contact Jürgen Becker, Dept. of Computer Science, University of Kaiserslautern, by e-mail no.: abakus@informatik.uni-kl.de

[1] Reiner W. Hartenstein, Jürgen Becker: Hardware/Software Co-Design for data-driven Xputer-based Accelerators; to be published in Proc. of 10th Int. Conf. on VLSI Design (Theme: VLSI in Multimedia Applications), January 4-7, 1997, Hyderabad, India
[2] Reiner W. Hartenstein, Jürgen Becker, Michael Herz, Ulrich Nageldinger: A General Approach in System Design Integrating Reconfigurable Accelerators; Proc. of IEEE 1996 Int¹l. Conference on Innovative Systems in Silicon; Austin, Texas, USA, October 9-11, 1996
[3] Reiner W. Hartenstein, Jürgen Becker, Michael Herz, et al.: Co-Design and High Performance Computing: Scenes and Crisis; Proceedings of Reconfigurable Technology for Rapid Product Development & Computing, Part of SPIE¹s International Symposium 96, Boston, USA, Nov. 1996
[4] R. Hartenstein, J. Becker, et al.: Custom Computing Machines vs. Hardware/Software Co-Design: from a globalized point of view; 6th Int¹l. Workshop On Field Programmable Logic And Applications, FPL¹96, Darmstadt, Germany, September 23-25, 1996, Lecture Notes in Computer Science, Springer Press, 1996
[5] Reiner W. Hartenstein, Jürgen Becker, et al.: An Embedded Accelerator for Real Time Image Processing; 8th EUROMICRO Workshop on Real Time Systems, L¹Aquila, Italy, June 1996
[6] Reiner W. Hartenstein, Jürgen Becker, Michael Herz, et al.: A Parallelizing Programming Environment for Embedded Xputer-based Accelerators; High Performance Computing Symposium 96, Ottawa, Canada, June 1996
[7] Reiner W. Hartenstein, Jürgen Becker, Michael Herz, et al.: A Partitioning Programming Environment for a Novel Parallel Architecture; 10th International Parallel Processing Symposium (IPPS), Honolulu, Hawaii, April 1996
[8] Reiner W. Hartenstein, Jürgen Becker, et al.: Two-Level Hardware/Software Partitioning Using CoDe-X; Int. IEEE Symp. on Engineering of Computer Based Systems (ECBS), Friedrichshafen, Germany, March 1996
[9] Reiner W. Hartenstein, Jürgen Becker, et al.: Two-Level Partitioning of Image Processing Algorithms for the Parallel Map-oriented Machine; 4th Int. Workshop on Hardware/Software Co-Design CODES/CASHE 96, Pittsburgh, USA, March 1996
[10] R. Hartenstein, J. Becker, et al.: A Profiling-driven Hardware/Software Partitioning of High-level Language Specifications; IFIP Int. Workshop on Logic and Architecture Synthesis, Grenoble, France, Dec. 1995
[11] Reiner W. Hartenstein, Jürgen Becker, et al.: CoDe-X: A Novel Two-Level Hardware/Software Co-Design Framework; Proc. of VLSI Design 96 Conf., Bangalore, India, January 1996
[12] Reiner W. Hartenstein, Jürgen Becker, et al.: A Novel Hardware/Software Co-Design Framework; Journal of the Brazilian Computer Society: Special Issue on Electronic Design Automation, no.2, vol. 2, pp. 16-26, November 1995
[13] Reiner W. Hartenstein: Hardware/Software Co-Design; aktuelles Schlagwort; GI Informatik-Spektrum 18: p. 286-287, Springer-Verlag, Oktober 1995
[14] Reiner W. Hartenstein, Jürgen Becker, et al.: A Two-Level Hardware/Software Co-Design Framework for Automatic Accelerator Generation; Workshop on Design Methodologies for Microelectronics, Smolenice Castle, Slovakia, September 1995
[15] Reiner W. Hartenstein, Jürgen Becker, et al.: A Parallelizing Compilation Method for the Map-oriented Machine; Proceedings of Int. Conf. on Application Specific Array Processors, Strasbourg, France, July 1995
[16] Reiner W. Hartenstein, Karin Schmidt: Combining Structural and Procedural Programming by Parallelizing Compilation; Proceedings of the Symposium on Applied Computing, Nashville, TN, Feb. 1995
[17] R. W. Hartenstein, K. Schmidt: A Restructuring Compilation Method for the Xputer Paradigm: IWPP 94, Proceedings of the Int. Workshop on Parallel Processing, Bangalore, India, Dec. 1994
[18] R. Hartenstein, K. Schmidt: Parallelizing Compilation for a Novel Data-Parallel Architecture; J. P. Gray, F. Naghdy (Eds.), PCAT-94, Parallel Computing: Technology & Practice, Wollongong, Australia, Nov. 1994
[19] A. Ast, J. Becker, R. W. Hartenstein, et al.: Data-procedural Languages for FPL-based Machines; 4rd Int. Workshop On Field Programmable Logic And Applications, FPL¹94, Prague, September 7-10, 1994, Lecture Notes in Computer Science, Springer, 1994
[20] R. Hartenstein: Hardware / Software Codesign; Internal Report No. 246/94, Univ. of Kaiserslautern, 1994
[21] A. Ast, J. Becker, R. Hartenstein, et al.: MoPL-3: A New High Level Xputer Programming Language; 3rd Int´ Workshop On Field Programmable Logic And Applications, Oxford, 7. - 10. Sept. 1993





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