PATMOS 2000     International Workshop - Power and Timing Modeling, Optimization and Simulation 
Göttingen, Germany - September 13-15, 2000    --    http://patmos2000.uni-hannover.de 
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About PATMOS 2000 


Background

The workshop is the tenth in a series of international workshops having been held in several places in Europe. PATMOS has over the years evolved into a well established and outstanding series of open European events on power and timing aspects of integrated circuit design. The increased interest especially in low-power design adds further momentum to the interest in this workshop. Despite its growth, the workshop can still be considered as an informal but very focused conference, featuring high-level scientific presentations together with open discussions and panel sessions in a free and easy environment.

In the year 2000, the venue will be in Göttingen, Germany, near to Hannover, the city that hosts the world exposition EXPO2000.

Scope

The objective of this workshop is to provide a forum to discuss and investigate the emerging problems in the design methodologies and CAD-tools for the new generation of IC technologies. A major emphasis of the technical program is on speed and low-power aspects with particular regard to modeling, characterisation, design, and architectures. The scope of the workshop includes, but is not limited to design and CAD aspects of:
  • Low Power design: high perfomance low power systems, ultra low power systems, special architectures 
  • Modeling and synthesis: timing, power, low-voltage, interconnect, crosstalk 
  • Timing design: clocking, sychronization, asychronous and self timed systems, adiabatic switching 
  • Optimization: low voltage low power logic families, logic parallelization, pipelining, fast low power arithmetic 
  • Physical design: module generation, library optimization and characterization, area estimation 
  • Physical test and characterisation: low VT low voltage process, SOI, IDDQ, models and parameter extraction, experimental design for process control 
  • Design methods and CAD tools: for low voltage low power design, high speed circuits 
  • Trade-offs between devices, architectures and technologies, bench mark comparison. 

Previous Locations

1991 Kaiserslautern, Germany
1992 Paris, France
1993 Montpellier, France
1994 Barcelona, Spain
1995 Oldenburg, Germany
1996 Bologna, Italy
1997 Louvain-la-Neuve, Belgium
1998 Lyngby, Denmark
1999 Kos Island, Greece
A. Freimann, 22.10.1999