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The international workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) has evolved over the years into a well established and outstanding series of open European events on power and timing aspects of integrated circuit design. The increased interest, especially in low-power design, adds further momentum to the interest in this workshop.

The objective of the workshop is to provide a forum to discuss and investigate the emerging problems in the design methodologies and CAD-tools for the new generation of IC technologies. A major emphasis of the technical programme is on speed and low-power aspects with particular regards to modeling, characterization, design and architectures.

PATMOS is organised yearly in Europe and attended by top-level scientists and researchers both from industry and academia. PATMOS 2005 will be organised from September 20, 2005 until September 23, 2005 at IMEC vzw, in the vicinity of Leuven, Belgium.


September 16, 2005
Final Program on-line!

August, 2005
Program on-line!

August, 2005
Registration open

October 31, 2004
Web site on-line!






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