DEIS - Dipartimento di Elettronica, Informatica e Sistemistica
University of Bologna
PATMOS'96
Sixth International Workshop Program
Bologna, Italy
23 - 25 September 1996
The PATMOS Workshop
The workshop is the sixth of a series of international workshops held in
Kaiserslautern, Germany, 1991, Paris, France, 1992, Montpellier, France,
1993, Barcelona, Spain, 1994 and Oldenburg, Germany, 1995. It originated from technical meetings of
the European project Power And Timing Modeling Optimization and
Simulation. PATMOS has over the years evolved into a well established and
outstanding series of open European events on power and timing at the
logical and physical level of design. Within this scope, design issues and
CAD related topics are covered. The availability of deep sub-micron
technology has recently increased interest especially in low-power design
and this gives additional momentum to the interest in this workshop.
This development has also extended the scope of PATMOS to higher levels of
abstraction, in particular for power optimization. Despite its growth, the
workshop can still be considered as an informal, but very focused conference,
featuring high level scientific presentations, together with open discussions
and panel sessions, in a free and easy environment. This special atmosphere
has proven to be an excellent origin of new ideas and interesting
co-operations and projects.
This year program
The technical program for PATMOS 96 has the same general structure as
last editions', to consolidate a satisfactory tradition, but, also
simply because it has been proven to be adequate and successful.
The technical sessions are devoted to the most important and
up-to-date subjects concerning IC design and characterization,
with particular emphasys on power consumptions and signal delays,
traditional to the workshop, but to interesting
related subjects, such as IDDQ testing and non-conventional architectures.
The technical sessions will be accompanied by three invited papers,
given by particularly qualified speakers, concerning tools and
enviroment for power estimation and synthesis, simulation for reliability
and on chip IDDQ testing.
Finally, in the best workshop tradition, a panel of competent expert
will discuss design tools at RTL level from the point of expectations
and actual performance.
Naturally, plentiful discussions among the participants are an
integral part of the program.
A concert, a banquet and the charming enviroment of Bologna
will certainly help in making the workshop more enjoyable.
The Department of Electronics, Informatics and Systems (DEIS) represents
one of the largest scientific institutions of the University of Bologna,
the oldest in the world.
DEIS has about 150 members, including Professors, Research Assistants,
Technicians, Staff Members, Ph.D. Students,..., whose activity covers a
very wide and diversified
ground, including all modern Information Technologies.
Scientifically, it has a strong reputation at international level in
several fields. Furthermore, it makes a significant effort to
teaching, as well as in continuing education of engineers and
technicians employed in industry.
Collaboration with large and small enterprises, in Italy as well as
abroad, is a common practice in the activity of DEIS.
Committee
General Chair:
Prof. Dr. Bruno Riccò
DEIS Universita di Bologna
V. le Risorgimento 2
I-40136 Bologna, Italy
phone: +39 (0) 51 644-3018
fax.: +39 (0) 51 644-3073
e-mail: bricco@deis.unibo.it
Program Chair:
Prof. Dr.-Ing. Wolfgang Nebel
Oldenburg University and OFFIS
D-26111 Oldenburg, Germany
phone : +49 (0) 441 798-4519/4517
fax.: +49 (0) 441 798-2145
e-mail: nebel@informatik.uni-oldenburg.de
Conference Secretariat:
Mrs. Rita Mambelli
DEIS Universita di Bologna
V. le Risorgimento 2
I-40136 Bologna, Italy
phone: +39 (0) 51 644-3006
fax.: +39 (0) 51 644-3073
e-mail: rmambelli@deis.unibo.it
Steering Committee:
D. Auvergne, Univ. of Montpellier, France
R. Hartenstein, Univ. of Kaiserslautern, Germany
W. Nebel, Univ. of Oldenburg, Germany
C. Piguet, CSEM, Switzerland
B. Riccò, Univ. of Bologna, Italy
A. Rubio, Univ. of Catalunya, Spain
Program committee:
D. Auvergne, Univ. of Montpellier , France
J. Benkoski, EurEPIC, France
M. Declercq, EPF-Lausanne, Switzerland
M. Favalli, Univ. of Bologna, Italy
J. Figueras, Univ. of Catalunya, Spain
A. Guyot, INPG Grenoble, France
V. Moshnyaga, Univ. of Kyoto, Japan
H. Nguyen, Bull Paris, France
S. Jones, Univ. of Loughborough, U.K.
R. Hartenstein, Univ. of Kaiserslautern, Germany
W. Nebel, Univ. of Oldenburg, Germany
A. Nunez, Univ. of Las Palmas, Spain
P. Olivo, Univ. of Ferrara, Italy
H. Pfleiderer, Univ. of Ulm, Germany
M. Pedram, Univ. of Southern California, USA
C. Piguet, CSEM, Switzerland
R. Reis, Univ. of Porto Alegre, Brazil
B. Riccò, Univ. of Bologna, Italy
M. Robert, Univ. of Montpellier , France
A. Rubio, Univ. of Catalunya, Spain
J. Sparsx, Univ. of Lyngby, Denmark
A. Stemptowsky, Univ. of Moscov, Russia
A. Strojwas, Univ. of Carnegie Mellon, USA
C. Svensson, Univ. of Linköping, Sweden
C. Trullemans, Univ. of Louvain, Belgium
The conference site is an ancient monastery downtown Bologna, Piazza San Giovanni in Monte, 2.
Monday, September 23
09:00 - 10:30 SESSION 1: Opening
Chair: B. Riccò
Welcome   B. Riccò
The PATMOS 1996 program   W. Nebel
Invited talk
"A Distributed Environment for Power Estimation and Low-Power Synthesis"
Giovanni de Micheli, Stanford University, USA
Invited talk
"Realization of an On-chip IDDQ-Test in a Standard Cell Based Design -
A Review of Special Design Problems"
Thomas Lindenkreuz,
Matthias Ringe, Robert Bosch GmbH, Germany
Coffee break
11:00 - 12:30 SESSION 2:
Design Techniques for
Low Power
Chair: A.M. Trullemans, Univ. of Louvain, Belgium
- 2.1
"Design Techniques for Low Power Multipliers",
J. Smit,
University of Twente
Enschede, The Netherlands
- 2.2
"Low-Power Design of Finite State Machines",
C. Piguet,
CSEM Centre Suisse d'Electronique et de Microtechnique,
Neuchâtel, Switzerland
- 2.3
"Test-IC for Power Consumption Analysis",
G. Jochens, D. Rabe, B. Timmermann, W. Nebel,
University of Oldenburg, Germany
Lunch break
14:30 - 16:00 SESSION 3:
Timing Modeling
Chair: D. Auvergne, Univ. of Montpellier , France
- 3.1
"Timing Analysis in General Interconnection RC Networks",
D. Deschacht, E. Vanier,
University of Montpellier II,
Montpellier, France
- 3.2
"Modeling Signal Waveshapes for Empirical
CMOS Gate
Delay Models",
L. T. Pileggi, F. Dartu,
Carnegie Mellon University,
Pittsburgh, USA
- 3.3
"Statistical Modeling of the Influence of CMOS Process
Fluctuations on Dynamic Performance",
M. De Almeida, X. Règnier,
Aerospatiale, Centre commun de recherches Louis-Bleriot,
Suresnes, France
Coffee break
16:30 - 18:00 SESSION 4:
Power Optimization
Chair: H. Nguyen, Bull Paris, France
- 4.1
"A Tree Driven Matching for Complex Gates Targeting Low
Power",
B. Laurent, G. Saucier,
Institut National Polytechnique de Grenoble,
Grenoble, France
- 4.2
"Extracting Higher Performance/Power Ratio in Combinational
CMOS Circuits",
Sri
Parameswaran, Hui Guo,
University of Queensland, Australia
- 4.3
"Reducing Power Consumption by Using Optimally Pipelined
Circuits",
Per Larsson-Edefors,
Linköping University,
Linköping, Sweden
20.30 Evening concert
Tuesday, September 24
09:00 - 10:30 SESSION 5:
Asynchronous Design
Chair: C. Piguet, CSEM, Switzerland
- 5.1
"Throughput Rate and Power Dissipation in Self-timed
Circuits",
O. Aumann, H.-J. Pfleiderer,
University of Ulm,
Ulm, Germany
- 5.2
"Can Asynchronous Design Reduce Power Dissipation in GaAs
ICs?",
Renato P. Ribas, Alain Guyot,
TIMA/INPG Laboratory,
Grenoble, France
- 5.3
"Delay-Insensitive Asynchronous Circuits with CMOS Ternary
Logic for Low-Power Applications",
R. Mariani, R. Roncella, R. Saletti, P. Terreni,
University of Pisa,
Pisa, Italy
Coffee break
11:00 - 12:30 SESSION 6:
Power Modeling
Chair: A. Nunez, Univ. of Las Palmas, Spain
- 6.1
"Short-Circuit Power Modeling in Sub-micron CMOS",
M. Angeles Ortega, Joan Figueras,
Politechnical University of Catalunya,
Barcelona, Spain
- 6.2
"CMOS Short-Circuit Power Dissipation Including Velocity
Saturation and Gate-to-Drain Capacitive Coupling",
L. Bisdounis, O. Koufopavlou, S. Nikolaidis (1),
University of Patras, Patras, Greece,
(1) Univ. of Thessaloniki,
Thessaloniki, Greece
- 6.3
"Comparison of Different Gate Level Glitch Models",
D. Rabe, B. Fiuczynski, L. Kruse, A. Welslau,
W. Nebel,
University of Oldenburg and OFFIS, Germany
Lunch break
14:30 - 16:00 SESSION 7:
Design Aids for Low
.4mm
Power
Chair: S. Jones, Univ. of Loughborough, UK
- 7.1
"Regression models for behavioral power estimation",
L. Benini, A. Bogliolo, M. Favalli (1), G. De Micheli,
Standford University,
Standford, USA,
(1) Università di Bologna, Italy
- 7.2
"Fast and Accurate CMOS Supply Current and Activity
Simulation and Visualization",
M. Kuboschek, J. Bruns,
University of Hanover,
Hanover, Germany
- 7.3
"Generation of Binary Patterns with Given Spatiotemporal
Correlations",
M. Radetzki, B. Timmermann, D. Rabe, W. Nebel,
University of Oldenburg,
Oldenburg, Germany
Coffee break
16:30 - 18:00 SESSION 8:
panel
"How accurate should we expect RT-level
timing and power estimation tools to be?"
Moderator: W. Nebel (Univ. of Oldenburg and OFFIS), Oldenburg, Germany
Panelists:
D. Auvergne (LIRMM, Montpelier, France)
J. Benkoski (EurEPIC, Grenoble, France)
G. de Micheli (Stanford, USA)
J. Figueras (UPC, Barcelona, Spain)
C. Traylor (National Semiconductors, Santa Clara, USA)
20.30 Banquet
Wednesday, September 25
09:00 - 10:30 SESSION 9: Interconnect and Gate
Modelling
Chair: J. Figueras, Univ. of Catalunya, Spain
- 9.1
"Interconnect Capacitance Modeling Based on the On-Chip
Measurement of Realistic Test Patterns",
P. Nouet, Ch. Landrault, A. Toulouse,
LIRMM UMR CNRS, University of Montpellier II,
Montpellier, France
- 9.2
"Sensitivity of Interconnection Optimal Sizing to Supply
Voltage Reduction",
E. Vanier, D. Deschachat,
University of Montpellier II,
Montpellier, France
- 9.3
"Analytical Internal Power Macro-modelling for Submicronic
CMOS Structures"
S. Turgis, J.M. Daga, D. Auvergne,
LIRMM UMR CNRS, University of Montpellier II,
Montpellier, France
Coffee break
11:00 - 12:30 SESSION 10: Cell Modelling and
Characterization
Chair: H. Pfleiderer, Univ. of Ulm, Germany
- 10.1
"An Automated Simulation-Based Methodology for Full
Custom Microprocessor Macrocell Characterisation"
R. York, K. S. P. Clarke
Advanced RISC Machines Ltd.
Cherry Hinton, Cambridge, England
- 10.2
"Analog Capability of Digital Semi-Custom Arrays",
Th. Baechler, M. Kayal, M. Declercq
Swiss Federal Institute of Technology,
Electronics Laboratory,
Lausanne, Switzerland
- 10.3
"Design oriented standard cell delay modelling",
J.M. Daga, S. Turgis, D. Auvergne,
LIRMM UMR CNRS, University of Montpellier II,
Montpellier, France
Lunch break(see remark below)
14:30 - 16:00 SESSION 11: Reliability(see remark below)
Chair: M. Declercq, EPF-Lausanne, Switzerland
Invited talk:
"Simulation for Reliability", Tak K. Young, EPIC Design Technology
- 11.1
"Maximizing the Weighted Switching Activity in
Combinational CMOS Circuits",
S. Manich, J. Figueras,
Politechnical University of Catalunya,
Barcelona, Spain
- 11.2
"Estimation of Maximum Static Power Consumption of
CMOS Circuits",
Antoni Ferrè, Joan Figueras,
Politechnical University of Catalunya
Barcelona, Spain
Coffee break
16:15 - 17:15 SESSION 12: Low Power Libraries(see remark below)
Chair: A. Guyot, INPG Grenoble, France
- 12.1
"Low-Power CMOS Digital Cell Libraries:
Performance and Testability,
P. Correia, P. Machado, P. Carvalho, M. Santos,
F. Goncalves, J.P. Teixeira,
INESC, IST,
Lisboa Codex, Portugal
- 12.2
"Improving Cell Libraries for Low Power Design",
A. Alvandpour, Ch. Svensson,
Linköeping University
Linköeping, Sweden
17:15 - 17:30 CLOSING (see remark below)
Chairs: B. Riccò, W. Nebel
Remark:
The lunch break will probably be reduced to one hour in order to close a little
earlier and make travelling on wednesday evening possible.
About Bologna
Capital city of Emilia-Romagna, Bologna is at the intersection
between northern and central Italy. Its population is half a milion. Originally
an Etruscan settlement, it fell under Gaulish rule in 400 B.C. to eventually
become a Roman colony. About 1088 A.D. the oldest university in the world
was founded within its walls. Historic mansions and churches line the
streets of one of the best preserved old towns in Europe, and highlight
its cultural heritage through the ages. A typical landmark of the town
is the line of porticoes adorning the streets, stretching to almost 40
kilometers.
How to reach Bologna
By car: the main highway connection
is A1, "Autostrada del Sole", that joins Bologna to Milan,
Florence and Rome and links it to other three guiding highway: Turin-Brescia
A21, Genoa-LaSpezia A15, Brennero-Verona A22. All the highway exits to
Bologna get into a ring road (Tangenziale), from which
all directions can be easily reached.
By train: Bologna is the main Italian railway
junction, therefore all the most important national and international
lines touch it.From the railway station bus and taxi services
are available. The bus ticket can be purchased at Tabacco Shops or Newspaper
Stands, and costs Lit. 1500. The Railway Station is close to the town-center,
so the hotels chosen for the workshop can be reached in few minutes' walk.
By plane:
flights from abroad arrive at Guglielmo Marconi Airport, convenientely
located near the city, with easy bus and taxi connection. A taxi costs
approximately Lit. 25000 - 30000.
Bus n. 91 - Starting at 6,10 am.
leaves every hour from the Airport and stops in the centre of the City and the Railway station.
A special bus called Aerobus starts at 6,40 am. and also brings to downtown.
Its frequency is every 30 min. The ticket can be purchased on the bus
and costs Lit. 6000.
Registration and Hotels
Registration is possible in advance
or on site. Advance registrations are strongly recommended: payments must
be free of any charges. Cancellations will only be accepted if made in
written form to the workshop secretariat. Registrations cancelled before
Sept. 7, will be refunded 80 % of the fees paid. Later cancellation
will be charged full fees, however a substitute can be nominated at any
time before the opening of the workshop. Bank transfer shall be made to
PATMOS'96, Rolo Banca 1473
account no. 15229/5
Piazza Aldrovandi 12, Bologna, Italy.
Please state clearly "PATMOS '96" and name of participant on the
bank transfer form.
Registration fees:
before Sept. 7 Lit. 600.000
after Sept. 7 Lit. 650.000
Companion banquet ticket Lit. 100.000
The
registration fee includes:
admittance to the workshop
one copy of the proceedings
lunches and coffee breaks
concert on Monday evening
banquet on Tuesday evening
Hotel Reservation
A limited number of rooms have been reserved
at a discount rate. Hotel room reservations will be made until Sept. 7,
96 and are subject to availability. All reservations will be confirmed.The
credit card number is required for reservations. If no credit card is available,
a first night deposit is requested. In this case, checks in italian liras are acceptable and should be made payable to the
PATMOS '96 Secretariat. Cancellations and/or changes should be made in
writing to the conference Secretariat.
Hotel reservation form
please return before 7 Sept. to
PATMOS'96 Secretariat - Mrs. Rita Mambelli
DEIS - University of Bologna
Viale Risorgimento, 2
40136 Bologna, Italy
Fax. 39 51 644 3073
Please circle the preferred allocation (all prices are in italian lire):
|
Name/location | Cat. | Single | Double s.o. | Double |
| Grand Hotel | ***** | 220000 | 250000 | 310000 |
|
Baglioni | | | | |
|
San Donato | **** | 135000 | 165000 | 185000 |
|
Tre Vecchi | **** | 175000 | | 230000 |
|
Commercianti | *** | 130000 | 165000 | 180000 |
|
Holiday | *** | 100000 | 115000 | 140000 |
|
Paradise | *** | 100000 | 115000 | 140000 |
|
Regina | *** | 130000 | | 180000 |
|
University | *** | 100000 | 115000 | 140000 |
(s.o.)
single-occupancy
double rooms are available where specified
All hotels are close to downtown.
Name: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
First Name: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Address: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
City: . . . . . . . . . . . . . . . . . . . . . . . . . . . Zip code: . . . . . . . .
Country: . . . . . . . . . . . . . . . . . . . .
Phone: . . . . . . . . . . . . . . . . . . . Fax: . . . . . . . . . . . . . . . . . . .
Arrival: . . . . . . . . . . . . . . . . . . .
Departure: . . . . . . . . . . . . . . . . .
Reservation deposit:
Credit card
, Check
Credit card: . . . . . . . . . . . . . . . . . . . No. . . . . . . . . . . . . . . .
Expiration date: . . . . . . . . . . . . .
Signature: . . . . . . . . . . . . . . . . . . .
Registration Form
please return before 7 Sept. to
PATMOS'96 Sectretariat - Mrs. Rita Mambelli
DEIS - University of Bologna
Viale Risorgimento, 2
40136 Bologna, Italy
Fax. 39 51 644 3073
Name: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
First Name: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Affiliation: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Address: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
City: . . . . . . . . . . . . . . . . . . . . . . . . . . Zip code: . . . . . . . . . .
Country: . . . . . . . . . . . . . . . . . . .
Phone: . . . . . . . . . . . . . . . . . . . Fax: . . . . . . . . . . . . . . . . . . .
Payment: . . . . . . . . . . . . . . . . . . .
Companion banquet tickets: . . . . . . . . . . . . . . . . . . .
Bank transfer to:
PATMOS'96, Rolo Banca 1473
account no. 15229/5
Piazza Aldrovandi 12, Bologna, Italy.
Signature . . . . . . . . . . . . . . . . . . .