8.1 " Delay Propagation Term for Submicron Interconnect ", E. Vanier and D. Deschacht, LIRMM - Université Montpellier, France.

With the latest development of technology, the reduction of the interconnect pitch has led to an improved layout density but has degraded the interconnect delay. Conventional tools model the wires by assuming a lumped capacitance on each net. This approach may be inaccurate for submicron design, where interconnect resistance dramatically affects the performance, especially in global interconnect networks. As a result, the interconnect problem must be treated with higher accuracy. We focus the paper on the delay propagation term introduced by the resistive component of the interconnect.