sedes PATMOS'97 
Seventh International Workshop Program 
Université Catholique de Louvain 
Louvain-la-Neuve, Belgium
September 8-10, 1997 

4.3 "A Rapid Boolean Technology Mapping applicable to Power Minimization", R. Ferreira, A-M. Trullemans-Anckaert and R. Jacobi, UCL/DICE, Belgium.

A novel approach to the Boolean mapping problem is presented. It relies on a Boolean matching algorithm [TF96], which may take advantage of don't care conditions . For area minimization, the comparison with the structural matching approach - used in SIS [Tou90] - shows that the Boolean mapping achieve better results in similar computing time. We will show that low power technology mapping techniques like POSE [IP96b] may take advantage of this Boolean matching algorithm.

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