Seventh International Workshop Program
ARAMIS A.S.B.L. - UCL-DICE
Université Catholique de Louvain
September 8-10, 1997
8.1 " A Physically Based I-V Model of Partially Depleted SOI MOSFET's dedicated to Deep Sub-micron VLSI/CMOS Technologies ", P. Flatresse, O. Faynot and J.L Pelloie, LETI (CEA-Tech. Avancees), France.
An analytical physically-based partially depleted (PD) SOI MOSFET model, suitable for low voltage, low-power applications and analog circuit design, is presented. Drain current is formulated by a single and continuous equation valid in all operating regions where all effects needed for scaling deep sub-micron devices are taken into account. Also, the impact ionization related floating body effect, which is inherent to SOI PD devices, is modeled. Accurate fitting of experimental I-V curves corresponding to 0.2 micron PD devices demonstrate the efficiency of the firstname.lastname@example.org