sedes PATMOS'97 
Seventh International Workshop Program 
Université Catholique de Louvain 
Louvain-la-Neuve, Belgium
September 8-10, 1997 

9.4 Estimation of Short-Circuit Power Dissipation for Static CMOS Gates Driving a CRC ß Load ",Akio Hirata, Hidetoshi Onodera and Keikichi Tamaru

Abstract - AsMOSFET sizes and wire widths become very small in recent years, influence of resistive component of interconnects on the estimation of propagation delay and power dissipation can no longer be neglected. In this paper we present a short-circuit power dissipation formula for static CMOS logic gates driving a CRC ß load. By representing the short-circuit current and the current flowing in the resistance of a CRC ß load by piece-wise linear functions, a closed-form formula is derived.

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