PATMOS '98
International Workshop - Power and Timing Modeling, Optimization and Simulation
Technical University of Denmark - October 7 - 9, 1998

Technical Program


Tuesday, October 6

14:00-16:00: Tutorial 1

16:00-18:00: Tutorial 2


Wednesday, October 7

09:00-10:30 Session 1: Opening
  Chair: Jens Sparsoe, Technical University of Denmark, DENMARK

Coffee break

11:00-12:30 Session 2: Cell design and Libraries
  Chair: Enrico Macii, Politecnico di Torino, ITALY

Lunch break

14:00-15:30 Session 3: Gate level time and power modelling
  Chair: Daniel Auvergne, LIRMM, FRANCE

Coffee break

16:00-17:30 Session 4: Pannel


Thursday, October 8

09:00-10:30 Session 5: High Level Power Modelling and Optimization
  Chair: Wolfgang Nebel, University of Oldenburg and OFFIS, GERMANY

Coffee break

11:00-12:30 Session 6: Architectural techniques and ROM modeling
  Chair: Joan Figueras i Pamies, UPC, SPAIN

Lunch break

14:00-15:30 Session 7: Power simulation and estimation
  Chair: Christian Piguet, CSEM, SWITZERLAND

Coffee break

16:00-17:30 Session 8: Timing issues and Tools
  Chair: Vasily Moshnyaga, Fukuoka University, JAPAN


Friday, October 9

09:00-10:30 Session 9: Interconnections & Technology
  Chair: Antonio Nunez, ULPGC, SPAIN

Coffee break

11:00-12:30 Session 10: Adiabatic
  Chair: Kaushik Roy, Purdue University, USA

Lunch break

14:00-15:30 Session 11: Asynchronous
  Chair: Per Larsson-Edefors, Linkoping University, SWEDEN

Coffee break

16:00-17:30 Session 12: Arithmetic & Processors
  Chair: Alain Guyot, INPG, FRANCE

TOP.GIF - 1306 Bytes Back to front.