Power and Timing Modeling, Optimization and Simulation
October 6-8, Kos Island, Greece
The workshop is the ninth in a series of international workshops
having been held in Kaiserslautern, Germany, 1991, Paris, France, 1992, Montpellier, France, 1993,
Barcelona, Spain, 1994, Oldenburg, Germany, 1995, Bologna, Italy, 1996,
Belgium, 1997, and Lyngby, Denmark, 1998. PATMOS has over the years evolved into a well established and outstanding series of open European events on power and timing aspects of intergrated circuit design.
The increased interest especially in low-power design adds further momentum to the interest in this workshop. Despite its growth, thw workshop can still be considered as an informal but very focused conference, featuring
high-level scientific presentations together with open discussions and panel sessions in a free and easy enviroment. In 1999 the venue will be in Kos Island of Greece.
The objective of this workshop is to provide a forum to discuss and investigate the emerging problems in the design methodologies and CAD-tools for the new
generation of IC technologies. A major emphasis of the technical program is on speed and low-power aspects with particular regard to modeling, characterisation, design, and architectures. The scope
of the workshop includes, but is not limited to design and CAD aspects of:
- Low Power design: high perfomance low power systems, ultra low power systems, special architectures
- Modeling and synthesis: timing, power, low-voltage, interconnect, crosstalk
- Timing design: clocking, sychronization, asychronous and self timed systems, adiabatic switching
- Optimization: low voltage low power logic families, logic parallelization pipelining, fast low power arithmetic
- Physical design: module generation, library optimization and characterisation, area estimation
- Physical test and characterisation: low VT low voltage process, SOI, IDDQ, models and parameter extraction, experimental design for process control
- Design methods and CAD tools: for low voltage low power design, high speed circuits
- Trade-offs between devices, architectures and technologies, bench mark comparison.