FAQ on Xputers - Xputer Lab Kaiserslautern - Reconfigurable Computing with KressArray
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Xputers: FAQ (1)

Frequently Asked Questions about Xputers

Contents

What is an Xputer?
The Xputer: is it a Transputer?
The Xputer: is it a data flow machine?
What is the main difference to the von Neumann machine?
Why ist the Xputer paradigm more general than von Neumann?
What is a Soft Machine?
Why Soft Machines?
Why is von Neumann bad for soft machines?

Xputers: FAQ (2)
Xputers: FAQ (3)
All about Data Sequencers
The Kress ALU Array
Xputer Lab History


What is an Xputer?

The Xputer is a deterministically data-driven non-von-Neumann computational machine paradigm (also see fig. 2). In contrast to a von Neumann computer an Xputer has one (or more) data sequener(s) (see fig. 1) instead of an instruction sequencer (see fig. 3).

The Xputer: is it a Transputer?

No, this time "X" does not mean "trans". A Transputer is a von Neumann machine. An Xputer is not. An Xputer is non-von Neumann.

The Xputer: is it a data flow machine?

Although the Xputer is data-driven, it is not a data flow machine (also see fig. 2). Xputer operationis are deterministically driven by a data sequencer (see fig. 1), whereas a "data flow machine" [1] [2] is sequenced by arbitration, i. e. a data flow machine uses a kind of Monte Carlo sequencing. With an Xputer you can practice the usual step-by-step debugging at single-step mode, which, however is not possible with a data flow machine. The Xputer is neither von Neumann, nor a dataflow machine. It is a basic machine paradigm of itsown (see fig. 2).

Fig. 1. Basic Structure of Xputers:

>

[loosely | DS | rALU | memXputer ]

What is a Data Sequencer?

To obtain more information about Data Sequencers and how to use them see page "All about Data Sequencers". Since a data sequencer does not generate instruction codes, it is only loosely coupled to ALU or other data path resources (see fig. 1) - in contrast to a von Neumann machine's instruction sequencers being tightly coupled to the ALU (see fig. 2) by a compact instruction code output.

What is the main difference to the von Neumann machine?

An Xputer does not have an instruction sequencer. It has one (or more) data sequencer(s) instead (also see fig. 1). Operations are not invoked by instruction codes. Operations are transport-triggered [3] [4] [5] [6] [7]. However, an Xputer is not a data flow machine (compare fig. 2)

<>Fig. 2. Comparing the Basic Maschine Paradigms:

 Computer1
 Xputer2
 Data Flow Machine
 control-flow-driven
    data-driven              
transport-triggered
 triggered by arbitration
deterministic
 indeterministic
1) von Neumann     2) non-von Neumann

Why ist the Xputer paradigm more general than von Neumann?

von Neumann is an excellent paradigm for hardwired machines, made application-specific only by procedural (sequential) code loaded into the RAM. For soft machines, however, the Xputer is a much better paradigm, since it simultaneously supports two mechanisms to make it application-specifi c: (1) procedural code loaded into the RAM and (2) structural code loaded to configure data path ressources. The loose coupling between data sequender(s) and data paths (see fig. 1) provides high flexibility and universality. That's why the Xputer is the ideal paradigm of computing machines including field-programmable devices.

What is a soft machine?

Software could have been defined as something, which can be compiled into machine code, downloadable into the RAM of a von Neumann machine. For execution this procedural code is scanned sequentially from this RAM. But now also field-programmable hardware has (hidden) RAM. Reconfiguration code may be downloaded into this RAM to redefine the structure of the hardware. Hardware has become soft and can be changed within milliseconds. Now we have two programming worlds: procedural programming versus structural programming. We have two worlds of computing: computing in time versus computing in space.

Why soft machines?

With the progress of multimedia technology we have to buy about every two years a new computer, which includes the newest add-on circuits to accelerate graphics, video, and other functionality. It would be desirable, to have a soft , but very powerful accelerator machine on board of a PC, into which I could download the reconfiguration code of software-only implementations of the newest multi media techniques.

Fig. 2b. New hardware needed to upgrade (Courtesy Pittsburgh Post-Gazette):


© 1995 Rogers, Pittsburgh Post-Gazette

Why is von Neumann bad for soft machines?

Having a reconfigurable ALU means, that you can change the ALU within milliseconds. Within a von Neumann machine you need a new instruction sequencer. The very tight coupling between instruction sequencer and ALU is the reason of this inflexibility (see fig. 3). That's why the von Neumann paradigm is bad for soft machines. But the Xputer well meets this challenge. Its data sequencer(s) is (are) only loosely coupled to its data path ressources (see fig. 1). You may use the same sequencer for an extremely wide variety of data path ressources, i. e. from simgle ALU to an ALU array. This high flexibility of the Xputer paradigm is provided by the very loose coupling between ALU and sequencer(s).

    Fig. 3. von Neumann Computer - basic Structure:
< >

[tightly | IS | DP | memvN ]

Compilers for Soft Machines

Soft Machines with reconfigurable ALUs like in the Kress Machine need a completely new class of compilers, which have to generate (combinational) reconfiguration code. An example of such a compiler is the CoDE-X System, which generates cde for both (see fig. 4), the host, and the accelerator machine - an Xputer with Kress Machine architecture. A first level partitioner decides, which part of the X-C source are translated into procedural host code. (X-C is a sligltly extended dialect of the C programming language). A second level partitioner translates the other part into procedural data sequencer code and reconfiguration code for the Kress Array.

< >Fig. 4. C Compiler for the Kress Machine:


Literature

[1] Theo Ungerer: Datenflußrechner; Teubner, 1993
[2] J. Dennis: Data Flow Supercomputers; IEEE Computer, pp. 48-56, Nov. 1980.
[3] H. Corporaal, H. Mulder: MOVE: A framework for high-performance processor design; Proc. Supercomputing ´91, Albuquerque, IEEE Computer Society Press, November 1991
[4] H. Corporaal, P, van der Arend: MOVE32INT, a Sea of Gates realization of a high performance Transport Triggered Architecture; Microprocessing and Microprogramming vol. 38, pp. 53-60, North-Holland, 1993
[5] H. Corporaal: Evaluating Transport Triggered Architectures for scalar applications; Transport Triggered Architecture; Microprocessing and Microprogramming vol. 38, pp. 45-52, North-Holland, 1993
[6] H. Caporaal: Transport Triggered Architectures; Ph. D. thesis, Tech. University of Delft, Holland, 1995
[7] G. J. Lipovski: On a Stack Organization for Microcomputers; in [8]
[8] R. Hartenstein, R. Zaks: Microarchitecture of Computer Systems; North Holland 1975

FAQ on Xputers (2)


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