Monday, 14:00 - 16:05
Christian Siemers, U of Appl.Sc. Heide
Reconfigurable Computing between Classification
and Metrics - The Approach of Space/Time-Scheduling
Winnie W. Cheng Steven J.E. Wilton, Babak
Hamidzadeh, U British Columbia
FPGA Implementation of a Prototype
WDM On-Line Scheduler
J.Hildebrandt, D.Timmermann, U Rostock
An FPGA Based Scheduling coprocessor
for Dynamic Priority Scheduling in Hard Real-Time Systems
S.Sawitzki, J.Schoenherr, R.Spallek, B.Straube,
IIS Erlangen
Formal Verification of a Reconfigurable
Microprocessor
R.Girones, V.Bosch, A.Cortes, A.Salcedo,
U Valensia
The Role of the Embedded Memories in
the Implementation of Artificial Neural Networks
J.Rosenberg, ATMEL ES2 GmbH - Programmable
System Level Integration brings System-on-Chip Design to the Desktop
A.Hilton, J.Hall, The Open University -
On
Applying Software Development Best Practice to FPGAs in Safety-Critical
Systems
B.Blodget, Xilinx Inc.
Pre-Route Assistant: A Routing Tool
for Run-Time Reconfiguration
T.Kobori, T.Maruyama, T.Hoshino, U.Tsukuba
High Speed Computation of Lattice Gas
Automata with FPGA
T.Shiozawa, N.Imlig, K.Nagami, K.Oguri,
A.Nagoya, H.Nakada, NTT
An Implementation of Longest Prefix
Matching IP Router on Plastic Cell Architecture
B.Matasaru, T.Jebelean, RISC-Linz
FPGA Implementation of an Extended
Binary GCD Algorithm for Systolic Reduction of Rational Numbers |