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Sunday, 27.Aug.
Program
Monday, 28 Aug.
Program
Posters
Tuesday, 29 Aug.
Program
Posters
Wednesday, 30 Aug.
Program |
Tuesday, Aug. 29
|
| 8:30 - 10:30 Plenum
Session 2
8:30 Keynote: Jan
Rabaey, UC Berkeley
Silicon platforms for the next generation
wireless systems -
What role does reconfigurable hardware
play?
9:15 Invited Paper:John
McCaskill, Patrick Wagler, GMD, Sankt Augustin
From reconfigurability to evolution
in construction systems -
spanning electronic, microfluidic
and biomolecular domains.
10:00 Invited Paper:M.Renovell,
LIRMM, U Montpellier
An attempt to define a structural testing
approach for RAM based FPGAs |
| 10:30 - 11:00
Coffee Break |
11:00 - 12:40 Mobile
Communication
J.Becker, T.Pionteck, M.Glesner, U Darmstadt
DReAM: A Dynamically Reconfigurable
Architecture for Future Mobile Communication Applications
A.Blaickner, O.Nagy, H.Gruenbacher, CTI,
Villach
Fast carrier and Phase Synchronization
Units for Digital Receivers Based on Re-configurable Logic
X.Reves, A.Gelonch, F.Casadevall, PU of
Catalonia, Barcelona
Software Radio Reconfigurable Hardware
J.Ramirez, A.Garcia, P.Fernandez, L.Parrilla,
A.Lloris, U Granada
Analysis of RNS-FPL Synergy for High
Throughput DSP Applications: Discrete Wavelet Transform |
11:00 - 12:40 Dynamically
Reconfigurable II
S.McMillan, S.Guccione, Xilinx Inc.
Partial Run-Time Reconfiguration Using
JRTR
X.Zhang, K.Ng, U Hong Kong
A Combined Approach to High-level Synthesis
for Dynamically Reconfigurable Systems
T.Rissa, J.Niittylahti, Tampere U
A Hybrid Prototyping Platform for Dynamically
Reconfigurable Designs
H.ElGindy, M.Middendorf, H.Schmeck, B.Schmidt,
U Karlsruhe
Task Rearrangement on Partially Reconfigurable
FPGAs with Restricted Buffer |
|
| 12:40 - 14:00
Lunch Break |
14:00 - 16:05 Design
Space Exploration
R.Hartenstein, M.Herz, T.Hoffmann, U.Nageldinger,
U Kaiserslautern
Generation of Design Suggestions for
Coarse-Grain Reconfigurable Architectures
P.Heysters, J.Smit, G.Smit, P.Havinga,U
Twente
Mapping of DSP Algorithms on Field
Programmable Function Arrays
D.Stefanovic, M.Martonosi, Princeton U
On Availability of Bit-narrow Operations
in General-purpose Applications
R.Grover, W.Shang, Q.Li, Santa Clara U
A Comparison of Bit-level and Word-level
Matrix Multipliers
F.Wolz, R.Kolla, U Wuerzburg
A new Floorplanning Method for FPGA
Architectural Research |
14:00 - 16:05 Student
Papers
S.Wadhwa, A.Dandalis, USC
Efficient Self-Reconfigurable Implementations
Using On-Chip Memory
A.Glasmacher, K.Woska, U Siegen
Design and Implementation of a XC6216
FPGA Model in Verilog
J.Andrejas, U Ljubljana
Reusable DSP Functions in FPGAs
M.Redekopp, USC LA
A Parallel Pipelined SAT Solver for
FPGA's
A.Touhafi, U Brussel
A Multi-Node Dynamic Reconfigurable
Computing System with distributed reconfiguration controlle |
|
| 16:05 - 16:30
Coffee Break |
16:30 - 18:35 Applications
I
O Yamamoto, Y.Shibata, H.Kurosawa, H.Amano,
Tokyo Denki U
A Reconfigurable Stochastic Model Simulator
for analysis of parallel systems
S.Bellis, W.Marnane, NMRC, Cork
A CORDIC Arctangent FPGA Implementation
for a High-Speed 3D-Camera System
S.Melnikoff, P.James-Roxby, S.Quigley,
M.Russel, U Birmingham
Reconfigurable Computing for Speech
Recognition: Preliminary Findings
H. Ploog, M. Schmalisch, D. Timmermann,
U Rostock
Security Upgrade of Existing ISDN Devices
by Using Reconfigurable Logic
T.Miomo, K.Yasuoka, M.Kanazawa, Kyoto U
The Fastest Multiplier on FPGAs with
Redundant Binary Representation |
16:30 - 18:35 Optimization
R.Enzler, T.Jeger, D.Cottet, G.Troester,
ETH Zurich
High Level Area and Performance Estimation
of Hardware Building Blocks on FPGAs
R.Tessier, H.Giza, U Massachusetts
Balancing Logic Utilization and Area
Efficiency in FPGAs
J.Emmert, J.Cheatham, P.Kataria, C.Stroud,
M.Abramovici, U Kentucky
Predicting Performance Penalty for
fault Tolerance in Roving Self-Testing AReas (STARs)
J.Qiao, M.Ikeda, K.Asada, U Tokyo
Optimum Functional Decomposition for
LUT-based FPGA Synthesis
M.Eisenring, M.Platzner,ETH Zurich
Optimization of Run-time Reconfigurable
Embedded Systems |
|
| 18:35 - 19:30
Break |
| 19:30
Boat trip on lake Ossiach with dinner |
|
