7th Reconfigurable Architectures Workshop (RAW 2000)

1 May 2000, Cancun, Mexico

Programme

8:30 Invited TalkSteven A. Guccione Xilinx Inc. 
9:30 JRoute: A Run-Time Routing API for FPGA Hardware Eric Keller Xilinx Inc.
10:00

Coffee break

10:30 A Reconfigurable Content Addressable Memory Steven A. Guccione, Delon Levi, Daniel Downs Xilinx Inc. 
11:00 ATLANTIS -- A Hybrid FPGA/RISC Based Re­configurable System O. Brosch, J. Hesser, C. Hinkelbein, K. Kornmesser, T. Kuberka, A. Kugel, R. Männer, H. Singpiel, B. Vettermann Universität Mannheim
11:30 The Cellular Processor Architecture CEPRA1X and its Conguration by CDL Christian Hochberger, Rolf Hofmann, Klaus Peter Volkmann, Stefan Waldschmidt University of Rostock, Darmstadt University of Technology
12:00 Loop Pipelining and Optimization for Run Time Reconfiguration Kiran Bondalapati, Viktor K. Prasanna University of Southern California 
12:30

Lunch break

13:30 Compiling Process Algebraic Descriptions into Recongurable Logic Oliver Diessel, George Milne University of South Australia 
14:00 Behavioral Partitioning with Synthesis for Multi-FPGA Architectures under Interconnect, Area, and Latency Constraints Preetham Lakshmikanthan, Sriram Govindarajan, Vinoo Srinivasan, Ranga Vemuri University of Cincinnati
14:30 Module Allocation for Dynamically Reconfigurable Systems Xue-jie Zhang, Kam-wing Ng The Chinese University of Hong Kong 
15:00

Coffee break

15:30 Augmenting Modern Superscalar Architectures with Configurable Extended Instructions Xianfeng Zhou, Margaret Martonosi Princeton University
16:00 Complexity Bounds for Lookup Table Implementation of Factored Forms in FPGA Technology Mapping Wenyi Feng, Fred J. Meyer, Fabriio Lombardi Lucent Technologies, Northeastern University
16:30 Optimization of Motion Estimator for Run-Time-Reconfiguration Implementation. Camel Tanougast, Yves Berviller, Serge Weber Université Henri Poincaré, Nancy
17:00 Constant-Time Hough Transform On A 3D Reconfigurable Mesh Using Fewer Processors Yi Pan University of Dayton
17:30 Panel on "Run-time Reconfiguration: Hurdles and Promises"Moderator: George Milne (University of South Australia) Members: Steven Guccione, Yi Pan, Hartmut Schmeck, Ranga Vemuri


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