Preliminary Program for RAW 2003

Nice, France, Tuesday, April 22nd 2003

8.00 - 8.10:Opening Session

8.10 - 9.00:Opening Keynote

Reiner Hartenstein

University of Kaiserslautern, Germany

Title:"Are we really ready for the break-through ?"

9.00 - 10.00:Session IArchitectures

Konstantinos Sarrigeorgidis, Jan Rabaey

University of California, Berkeley

Title:"Massively Parallel Wireless Reconfigurable Processor Architecture and Programming."

Fabio Campi, Andrea Cappelli, Roberto Guerrieri, Andrea Lodi, Mario Toma

Universita` di Bologna, Bologna, Italy

Alberto La Rosa, Luciano Lavagno, Claudio Passerone

Politecnico di Torino, Torino, Italy

Roberto Canegallo

NVM-DP Department of STMicroelectronics CR&D

Agrate, Italy

Title:"A Reconfigurable Processor Architecture and Software Development Environment for Embedded Systems."

Rodrigo Soares, Arnaldo Azevedo, Ivan Saraiva

Universidade Federal do Rio Grande do Norte, Brazil

Title:"X4CP32: A Coarse Grain General Purpose Reconfigurable Microprocessor."

10.00 - 10.30:Coffee Break

10.30 - 12.10:Session IIa/IIb(Parallel Session)

Session IIa: Tools and Mapping

Jason Lohn, Greg Larchev

NASA Ames Research Center, USA

Ronald DeMara

University of Central Florida, USA

Title:"Evolutionary Fault Recovery in a Virtex FPGA Using a Representation That Incorporates Routing."

Lilian Bossuet, Guy Gogniat, Jean-Luc Philippe

University of South Brittany, Lorient, France

Wayne Burleson, Vikas Anand

University of Massachusetts, Amherst, USA

Title:"Targeting Tiled Architectures in Design Exploration."

Shyamnath Harinath, Ron Sass

Clemson University, USA

Title:"Reconfigurable Mapping Functions for Online Architectures."

R. Leveugle, L. Antoni

TIMA Laboratori, Grenoble Cedex - France

B. Fehér

Budapest University of Technology and Economics, Hungary

Title:"Dependability Analysis: a New Application for Run-Time Reconfiguration."

Vincent Nollet

IMEC vzw, Belgium

Title:"Designing an Operating System for a Heterogeneous Reconfigurable SoC."

Session IIb: Design Methods

Antti Pelkonen

VTT Electronics, Oulu, Finland

Kostas Masselos

INTRACOM SA, Peania, Attika, Greece

Miroslav Cupák

IMEC, Leuven, Belgium

Title:"System-Level Modeling of Dynamically Reconfigurable Hardware with SystemC."

Paul Beckett

RMIT University, Melbourne, Australia

Title:"A Polymorphic Hardware Platform."

Octavian Cret, Kalman Pusztai, Cristian Vancea, Balint Szente 

Technical University of Cluj-Napoca, ROMANIA

Title:"CREC: A Novel Reconfigurable Computing Design Methodology."

Gilles Sassatelli, Pascal Benoit, Lionel Torres, Gaston Cambon, Michel Robert

Université Montpellier II, France

Didier Demigny

Ecole Nationale Supérieure de l'Electronique et de ses Applications, France

Title:"Metrics for Reconfigurable Architectures Characterization: Remanence and Scalability."

Osman Devrim Fidanci, Tarek El-Ghazawi, Nikitas Alexandridis

George Washington University, USA

Dan Poznanovic

SRC Computers Inc. 

Kris Gaj

George Mason University, USA

Title:"Performance and Overhead in a Hybrid Reconfigurable Computer."

12.10 - 13.40:Lunch Break

13.40 - 15.00:Session IIIa/IIIb(Parallel Session)

Session IIIa: Run-Time Reconfiguration

Daniel Mesquita

LIRMM , France

Title:"Remote and Partial Reconfiguration of FPGAs: tools and trends."

Kris Gaj, Jacek R. Radzikowski

George Mason University, USA

Nikitas Alexandridis , Mohamed Taher, Frederic Vroman

The George Washington University, USA

Title:"Effective Utilization and Reconfiguration of Distributed Hardware Resources Using Job Management Systems."

C. Tanougast, Y. Berviller, P. Brunet and S. Weber

Université de Nancy, France

Title:"Automated RTR temporal partitioning for reconfigurable embedded real-time system design."

Herbert Walder, Christoph Steiger, Marco Platzner

Swiss Federal Institute of Technology (ETH) Zurich, Switzerland

Title:"Fast Online Task Placement on FPGAs: Free Space Partitioning and 2D-Hashing."

Session IIIb: Applications

Matjaz Verderber, Andrej Zemva, Andrej Trost

University of Ljubljana, Slovenija

Title:"HW/SW Codesign of the MPEG-2 Video Decoder."

Ciaran Toal, Sakir Sezer

Queen’s University Belfast, UK

Title:"A Programmable and Highly Pipelined PPP Architecture for GIGABIT IP over SDH/SONET."

Nitin Srivastava, Jerry L. Trahan, Ramachandran Vaidyanathan, and Suresh Rai

Louisiana State University, USA

Title:"Adaptive Image Filtering using Run-Time Reconfiguration."

Paul M. Heysters, Gerard J.M. Smit

University of Twente, the Netherlands

Title:"Mapping of DSP Algorithms on the MONTIUM Architecture."

15.00 - 15.30:Coffee Break 

15.30 - 16.10:Keynote II

Martin Vorbach

PACT XPP Technologies AG, Muenchen, Germany

Title:"Reconfigurable Processor Architectures for Mobile Phones"

16.10 - 16.50:Session IVParallelization Techniques

João M. P. Cardoso 

University of Algarve, Portugal

Title:"Loop Dissevering: A Technique for Temporally Partitioning Loops in Dynamically Reconfigurable Computing Platforms."

Rong Lin

SUNY- Geneseo, Geneseo, USA

Title:"A Reconfigurable Low-power High-Performance Matrix Multiplier Architecture With Borrow Parallel Counters."

16.50 - 18.00:Poster Session

Mahmoud Meribout, Masato Motomura

NEC Corporation, Tokyo, Japan.

Title:"A New Scalable and Reconfigurable Architecture for high Speed and Programmable Routers."

H. S. Laskaridis, G. I. Papadimitriou, A. S. Pomportsis

Aristotle University of Thessaloniki, Greece

Title:"Applying Optical Reconfiguration on ATM Switch Fabrics."

Susumu Matsumae

Tottori University of Environmental Studies, Japan

Title:"An Efficient Scaling-Simulation Algorithm of Reconfigurable Meshes by Meshes with Partitioned Buses."

Siva Nageswara, Rao Borra, S. Suresh, A. Muthukaruppan, V. Kamakoti

Indian Institute of Technology, Madras, India

Title:"A Parallel Genetic Approach To The Placement Problem For Field Programmable Gate Arrays."

Sýddýka Berna ¨Ors, Lejla Batina, Bart Preneel, Joos Vandewalle

Katholieke Universiteit Leuven, ESAT/COSIC, Belgium

Title:"Hardware Implementation of a Montgomery Modular Multiplier in a Systolic Array."

Mauro Olivieri, Marco Raspa

La Sapienza University of Rome, Italy

Title:"Power Efficiency of Application-Dependent Self-Configuring Pipeline Depth in DSP Microprocessors."

Peter Alfke

Xilinx Inc.

Title:"Reconfigurable Interconnect."

Gael Rouvroy, Francois-Xavier Standaert, Jean-Jacques Quisquater, Jean-Didier Legat

Universite catholique de Louvain, Belgium

Title:"Efficient FPGA Implementation of Block Cipher MISTY1."

C. Morlet

Alcatel Space, France

M.-L.Boucheret, V.Calmettes, B.Paillassa, T.Perennou

TéSA, France

Title:"Towards generic satellite payloads : software radio."

Markus Huetter, Holger Bock

Infineon Technologies AG, Austria

Title:"A New Reconfigurable Architecture for Single Cycle Context Switching."

R. Henftling, W. Ecker, A. Zinn, M. Zambaldi, M. Bauer

Infineon Technologies AG, Munich, Germany

Title:"An Approach for Mixed Coarse Granular and Fine Granular Re-Configurable Architectures."

Kenneth B. Kent

University of New Brunswick, Canada

Micaela Serra

University of Victoria, Canada

Title:"Reconfigurable Architecture Requirements for Co-Designed Virtual Machines."

Christian Siemers, Volker Winterstein

University of Applied Sciences Nordhausen, Germany

Title:"Modelling Programmable Logic Devices and Reconfigurable, Microprocessor-related Architectures."

Minoru Watanabe, Fuminori Kobayashi

Kyushu Institute of Technology, Japan

Title:"An Optically Differential Reconfigurable Gate Array with dynamic reconfiguration circuit."

Visvanathan Subramanian, Joseph G. Tront, Charles W. Bostian, Scott F. Midkiff

Virginia Tech, USA

Title:"Design and Implementation of a Configurable Platform for Embedded Communication Systems."

C. Grabbe, M. Bednara, J. von zur Gathen, J. Shokrollahi, J. Teich

University of Paderborn, Paderborn, Germany

Title:"A High Performance VLIW Processor for Finite Field Arithmetic."

Chien-In Henry Chen

Wright State University, USA

Title:"Configurable Architecture of Linear Feedback Shifter Registers for Built-In Self-Test."

Miroslav Lícko, Jan Schier, Zdenek Pohl, Jirí Kadlec, Milan Tichý, Rudolf Matoušek, Antonín Hermánek

Institute of Information Theory and Automation, Academy of Sciences of the Czech Republic

Title:"Logarithmic Arithmetic for Real Data Types and Support for Matlab/Simulink based Rapid-FPGA -Prototyping."

Jean-Luc Beuchat

Laboratoire de l'Informatique du Parallelisme, (CNRS, ENSL, INRIA), France

Title:"Some Modular Adders and Multipliers for Field Programmable Gate Arrays."

Oliver Faust, Bernhard Sputh, Andreas Weisensee, Darran Nathan, Sana Rezgui, Alastair Allen

Affiliation N/A

Title:"A Single-Chip Supervised Partial Self-Reconfigurable Architecture for Software Defined Radio."

Carsten Nitsch

University of Leipzig, Germany

Title:"A Novel Design Technology for Next Generation Ubiquitous Computing Architectures."

In Ja Jeon, Boung Mo Choi, Jae Woo Wee, Phill Kyu Rhee, Chong Ho Lee

Inha University, Yong-Hyun Dong, Incheon, Korea

Title:"Evolutionary Reconfigurable Architecture for Robust Face Recognition."

Stefan Böttcher

University of Paderborn, Germany

Christian Dannewitz

Wallmedien AG, Paderborn, Germany

Title:"A Reconfigurable Message Oriented Middleware Architecture."

Matteo Canella, Filippo Miglioli, Alessandro Bugliolo

University of Ferrara, Italy

Enrico Petraglio, Eduardo Sanchez

Ecole Polytechnique Fédérale de Lausanne, Switzerland

Title:"Performing DNA comparison on a bio-inspired tissue of FPGAs."

Chunhui Zhang, Nader Bagherzadeh

University of California, Irvine, USA

Title:"A Parallel Method for Block Interleaving On MorphoSys RC Array."

18.00 - 18.10:Closing Remarks