NICE, France, April 22, 2003
10th Reconfigurable Architectures Workshop
The 10th Reconfigurable Architectures Workshop (RAW 2003) will be held at the Nice Acropolis Convention Center, Nice, France, on April 22, 2003. RAW 2003 is associated with the 17th Annual International Parallel & Distributed Processing Symposium (IPDPS 2003) and is sponsored by the IEEE Computers Society's Technical Committee on Parallel Processing. RAW 2003 is one of the major meetings for researchers to present ideas, results, and on-going research on both theoretical and practical advances in Reconfigurable Computing.
Main Focus of the Workshop:
Run-Time & Dynamic Reconfiguration: Architectures, Algorithms, Technologies
Run-Time and Dynamic Reconfiguration are characterized by the ability of underlying hardware architectures or devices to rapidly alter the functionalities of its components and the interconnection between them to suit the problem on the fly. Key to this ability is reconfiguration handling and speed. Though theoretical models and algorithms for them have established reconfiguration as a very powerful computing paradigm, practical considerations make these models difficult to realize. On the other hand, commercially available devices (such as FPGAs and new coarse-grain FPFAs) appear to have more room for exploiting run-time reconfiguration (RTR). An appropriate mix of the theoretical foundations of dynamic reconfiguration, and practical considerations, including architectures, technologies and tools supporting RTR is essential to fully reveal and exploit the possibilities created by this powerful computing paradigm. RAW 2003 aims to provide a forum for creative and productive interaction between all these disciplines.
Topics of Interest:
Authors are invited to submit manuscripts
of original unpublished research in all areas of dynamic and run-time reconfiguration
(foundations, algorithms, hardware architectures, devices, systems-on-chip
(SoC), technologies, software tools, and all kind of applications). The
topics of interest include, but are not limited to:
|Models & Architectures
||Algorithms & Applications
||Technologies & Tools
Authors should submit an electronic version of their work for review by October 20, 2002 to Juergen Becker (Universitaet Karlsruhe, firstname.lastname@example.org). All manuscripts will be reviewed by at least three members of the program committee. Submissions should be a complete manuscript (not to exceed 8 pages of single spaced text, including figures and tables) or, in special cases, may be a summary of relevant work. Submissions should be in pdf-format (preferred), or alternatively in Postscript (level 2) format. Authors should make sure that the submission can be viewed using ghostscript and will print on standard letter size paper (8.5" x 11").
The IEEE CS Press will publish the IPDPS
symposium and workshop abstracts as a printed volume. The complete symposium
and workshop proceedings will also be published by the IEEE CS Press as
a CD-ROM disk.
December 5, 2002
January 24, 2003
Serge Vernalde, IMEC, Belgium
Steering Chair: Viktor K. Prasanna, University of Southern California, USA
Program Chair: Juergen Becker, Universitaet Karlsruhe (TH), Germany
Publicity Chair: Ramachandran Vaidyanathan, Louisiana State University, USA