Biographical Notes

Dr.-Ing. Reiner W. Hartenstein currently is professor of Computer Science and Engineering at Kaiserslautern University, where he is also heading a research group for computer structures and VLSI design. He received all his academic degrees are from the Department of Electrical Engineering at Karlsruhe University, where he has worked for 5 years in research on pattern recognition and image processing. Before joining Kaiserslautern University Prof. Hartenstein joined the Computer Science Department of Karlsruhe University as an associate professor, where he worked in computer architecture and digital circuits and systems.

In 1981 he has been a visiting professor at the EECS Dept. of the University of California in Berkeley. In his first position after having received his Dipl.-Ing. degree he has worked in development of digital and hybrid circuits and systems at Karlsruhe Research Center, from where as a subcommittee chairman he also contributed to the development of the ESONE standard (European Standard On Nuclear Electronics).

Prof. Hartenstein is well known for his contributions to the CVT project and the CVS project (within earlier ESPRIT programs of the European Union), where he headed three subtasks on the development, implementation, and application of the hardware description languages KARL-3 and CVS_BK, the interactive graphic hardware description language ABL, as well a number of design data interchange formats, which served as a kind of early CAD framework for these projects. The KARL-3 language has been licensed to more than a hundred user institutions already in the mid' eighties, the most widely spread hardware description language, before VHDL came up. Within the IEEE standardization group on EDIF his group has also contributed to the development of the EDIF standard. This work has been funded by the federal minister of technology with in the DASSY project.

More grants have been received jointly from Siemens AG and the federal minister of technology for the ESRA project on developing an advanced multi microprocessor system. In the early 90ies Prof. Hartenstein has been contributor and project manager to the PATMOS project on low power VLSI design having been funded by the Commission of the EU within the ESPRIT basic research programme. A spin-off of the PATMOS project is the PATMOS international annual workshop still successfully running throughout Europe under this name (Prof. Hartenstein still is on the steering committee). In fact, the 0th PATMOS workshop has been an ESPRIT project review meeting, where also Christer Svensson (Univ. of Linkoeping) and Daniel Auvergne (Univ. of Montpellier) have been guest speakers. The PATMOS proposal has been 2 years ahead of the USA, where a workshop in this topic area has been founded two years later.

For more then ten years Prof. Hartenstein and his group works on reconfigurable hardware and its application development support tools, as well as on reconfigurable computing and related compilation techniques. For instance, a fundamental achievement of his group is a new data-procedural high-performance machine paradigm for soft machines with reconfigurable datapath   (Xputers - opening up new directions of R&D in reconfigurable computing and hardware/configware/software co-design), which has been well accepted, such as e. g. by best paper awards, an increasing rate of invitations (also keynotes). Also the well accepted paradigm of the KressArray reconfigurable datapath family, supporting up to several orders of magnitude more area-efficiency than FPGAs, has been developed by Prof. Hartenstein's Xputer Lab.

Prof. Hartenstein organized two Workshops on Reconfigurable Architectures in Conjunction with Supercomputing conferences and has been 6 times Programme Chair of an International Workshop within the FPL workshop series (on field-programmable logic and applications), having been originated at Oxford University, U.K, in 1991. With Prof. Hartenstein as Program Chair the 10th FPL workshop held August 27 - 30, 2000 at Villach, Austria, the number of submissions has more than doubled (compared to 1999) and attendance reached 237 (compared to about 80 of earlier Workshops of this series).

Prof. Hartenstein is co-founder of EUROMICRO, has been an IFIP officer for 12 years (IFIP working group 10.2, now 10.5), and, is a Senior Member of the IEEE. Together with Dr. Klaus Woelcken (who later joined the Commission of the EU) he is co-founder of the German multi-university E.I.S.-project (a national forerunner of the EUROCHIP project). Prof. Hartenstein has published 15 books, as an editor or as the author, as well as more than 350 professional papers, such as in books, periodicals, and conference proceedings, as well as course handout manuscripts or reports.

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