Biographical Notes


Reiner W. Hartenstein

Reiner Hartenstein is IEEE fellow, SDPS fellow and FPL fellow. Dr.-Ing. Reiner Hartenstein currently is professor of Computer Science and Engineering at Kaiserslautern University, where he was heading a research group for computer structures and VLSI design before he went "entpflichtet" (kind of privileged professor emeritus). The term "entpflichtet" means, that he still has all rights as a pofessor, being member of the department board and still acting as dissertation supervisor and member of search committees, and other academic committees and being involved in other academic activities.  Reiner Hartenstein was supervisor of 29 Ph.D. theses (of 16 as first reporter, and of 13 as second reporter) and of 110 master theses. Also 13 former members of his crew became professors.

He received all his academic degrees are from the Department of Electrical Engineering at Karlsruhe University, where he has worked for 5 years in research on pattern recognition and image processing as a scholar of Prof. Karl Steinbuch, the pioneer of artificial neural networks. Before joining Kaiserslautern University Prof. Hartenstein worked at the Computer Science Department of Karlsruhe University as an associate professor, where he was active in computer architecture and digital circuits and systems and became the father of the hardware description language KARL.

In 1981 he has been a visiting professor at the EECS Dept. of the University of California at Berkeley. In his first position after having received his Dipl.-Ing. degree he has worked in development of digital and hybrid circuits and systems at the Karlsruhe Research Center, from where as a subcommittee chairman he also contributed to the development of the ESONE standard (European Standard On Nuclear Electronics).

Prof. Hartenstein is well known for his contributions to the CVT project and the CVS project (within earlier ESPRIT programs of the European Union), where he headed three subtasks on the development, implementation, and application of the hardware description languages KARL-3 and CVS_BK, the interactive graphic hardware description language ABL, as well a number of design data interchange formats, which served as a kind of early CAD framework for these projects. The KARL-3 language has been licensed to almost a hundred user institutions already in the mid' eighties, the most widely spread hardware description language, before VHDL came up.  KARL software has been the backbone of the worlwide first complete VLSI design framework - years before an American coined this term.  Since the KARL language implementation is fully calculus-capable Hartenstein developed already in the 70ies a multiplier design example of term rewriting (TR) in hardware synthesis. Almost 30 years later the TR expert Prof. Mauricio Ayala-Rincon confirmed, that this example is still the only TR-based top-down hardware design example, since all other TR use in design is bottom-up (for verification). Within the IEEE standardization group on EDIF his group has also contributed to the development of the EDIF standard. This work has been funded by the federal minister of technology with in the DASSY project.

More grants have been received jointly from Siemens AG and the federal minister of technology for the ESRA project on developing an advanced multi microprocessor system. In the early 90ies Prof. Hartenstein has been contributor and project manager to the PATMOS project on low power VLSI design having been funded by the Commission of the EU within the ESPRIT basic research programme. A spin-off of the PATMOS project is the PATMOS international annual conference series still successfully running throughout Europe under this name (Prof. Hartenstein still is on the steering committee). In fact, the 0th PATMOS workshop has been an ESPRIT project review meeting, where also Christer Svensson (Univ. of Linkoeping) and Daniel Auvergne (Univ. of Montpellier) have been guest speakers. The PATMOS proposal has been 2 years ahead of the USA, where a workshop in this topic area has been founded two years later.  

For more then ten years Prof. Hartenstein and his group works on reconfigurable hardware and its application development support tools, as well as on reconfigurable computing and related compilation techniques. For instance, a fundamental achievement of his group is a new data-procedural high-performance machine paradigm for soft machines with reconfigurable datapath   (Xputers - using data counters instead of a program counter  - also called "anti-machine" - opening up new directions of R&D in reconfigurable computing and hardware/configware/software co-design), which has been well accepted, such as e. g. by best paper awards, an increasing rate of invitations (also keynotes). Also the well accepted paradigm of the KressArray reconfigurable datapath family, supporting up to several orders of magnitude more area-efficiency than FPGAs, has been developed by Prof. Hartenstein's Xputer Lab. The KressArray is a generalization of the original systolic array, which had supported only applications with strictly regular data dependencies.

Prof. Hartenstein organized two Workshops on Reconfigurable Architectures in Conjunction with Supercomputing conferences and has been 6 times Programme Chair of an International Workshop within the FPL workshop series (on field-programmable logic and applications), having been originated at Oxford University, U.K, in 1991. Since with Prof. Hartenstein as Program Chair the 10th FPL workshop held August 27 - 30, 2000 at Villach, Austria, the number of submissions has more than doubled (compared to 1999) and attendance reached 237 (compared to about 80 of earlier Workshops of this series) he was awarded by the title "FPL fellow". Reiner Hartenstein received quite a number of other awards, honorable mentioning and honorable invitations (clock here).  To see a preliminary listing of his achievements click here.

Prof. Hartenstein is co-founder of EUROMICRO, was program chair of the first EUROMICRO symposium, has been an IFIP officer for 12 years (IFIP working group 10.2, now called 10.5), and, is an  IEEE fellow. Later supported by Dr. Klaus Woelcken (who later joined the Commission of the EU) Reiner Hartenstein is the founder of the German multi-university E.I.S.-project (a national forerunner of the EUROCHIP and the EUROPRACTICE programme of the EU). The E.I.S. project started as the first Mead-&-Conway-based effort on the entire continent (from Lisbon thru Wladiwostok). Prof. Hartenstein has published 18 books, as an editor or as the author, as well as almost 500 professional papers, such as in books, periodicals, and conference proceedings, as well as course handout manuscripts or reports.

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