About Xputers - to run Configware

About Xputers - Reconfigurable Computing with KressArray

About Xputers

Description of the Xputer Paradigm

Many applications require intensively iterative data manipulations to be performed on a large amount of data, e.g. statement blocks in nested loops. The new architectural class of Xputers is especially designed to reduce the von Neumann bottleneck of repetetive decoding and address interpreting and data manipulations. This bottleneck contributes a significant amount ( up to 90% in image processing, 58% in digital signal processing) to the run time of previously mentionned type of algorithms. High performance improvements have been achieved for a large class of algorithms within important application areas such as e.g. digital signal processing, image processing, electronic design automatation and mathematical computation-intensive problems.

General information

The Xputer is a non-von Neumann machine paradigm, since it does not have an instruction sequencer, but a data sequencer is used instead. The basic structure of an Xputer module consists of three major parts :

two-dimensionally organized data memory
reconfigurable arithmetic & logic unit (rALU) including several rALU subnets with multiple scan windows
reconfigurable data sequencer (DS) comprising several generic address generators (GAGs)

The key difference to computers is, that data sequencer and a reconfigurable ALU replace computer's program store, instruction sequencer and the hardwired ALU. For operator selection instead of the sequencer another unit is used, which we call residual control. Operators activation is transport triggered (in contrast to control flow triggered activation in von Neumann computers.